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參數(shù)資料
| 型號： | ISL6310EVAL1 |
| 廠商： | Intersil Corporation |
| 英文描述： | Two-Phase Buck PWM Controller with High Current Intergrated MOSFET Driver |
| 中文描述： | 兩相降壓PWM控制器，帶有高電流集成MOSFET驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 20/27頁 |
| 文件大?。?/td> | 711K |
| 代理商： | ISL6310EVAL1 |
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20
FN9209.2
October 19, 2005
Due to errors in the inductance or DCR it may be necessary
to adjust the value of R
COMP
to match the time constants
correctly. The effects of time constant mismatch can be seen
in the form of droop overshoot or undershoot during the
initial load transient spike, as shown in Figure 19. Follow the
steps below to ensure the R-C and inductor L/DCR time
constants are matched accurately.
1. Capture a transient event with the oscilloscope set to
about L/DCR/2 (sec/div). For example, with L = 1
μ
H and
DCR = 1m
, set the oscilloscope to 500
μ
s/div.
2. Record
V
1
and
V
2
as shown in Figure 19.
3. Select a new value, R
COMP,2
, for the time constant
resistor based on the original value, R
COMP,1
, using the
following equation.
4. Replace R
COMP
with the new value and check to see that
the error is corrected. Repeat the procedure if necessary.
After choosing a new value for R
COMP
, it will most likely be
necessary to adjust the value of R
S
to obtain the desired full
load droop voltage. Use Equation 26 to obtain the new value
for R
S
.
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
Compensating the Load-Line Regulated Converter
The load-line regulated converter behaves in a similar
manner to a peak current mode controller because the two
poles at the output filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
2
and C
1
.
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
FIGURE 18. DCR SENSING CONFIGURATION
-
+
ICOMP
DCR
L
INDUCTOR
IL
1
V
OUT
C
OUT
-
+V
L
(s)
DCR
L
INDUCTOR
IL
2
PHASE1
PHASE2
R
S
R
S
R
COMP
C
COMP
ISUM
IREF
ISL6310
-
+
V
DROOP
I
OUT
DROOP
R
COMP 2
R
COMP 1
V
1
V
2
----------
=
(EQ. 27)
FIGURE 19. TIME CONSTANT MISMATCH BEHAVIOR
V
1
V
OUT
I
TRAN
V
2
I
FIGURE 20. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6310 CIRCUIT
ISL6310
COMP
C
1
R
2
R
1
FB
VDIFF
C
2
(OPTIONAL)
ISL6310
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