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參數(shù)資料
| 型號： | ISL6219ACA-T |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 20-TSSOP -40 to 85 |
| 中文描述： | SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | 0.150 INCH, PLASTIC, QSOP-28 |
| 文件頁數(shù)： | 13/17頁 |
| 文件大?。?/td> | 408K |
| 代理商： | ISL6219ACA-T |
13
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 9, 10, 11 and 12. Since the power equations
depend on MOSFET parameters, choosing the correct
MOSFETs can be an iterative process that involves
repetitively solving the loss equations for different MOSFETs
and different switching frequencies until converging upon the
best solution.
Current Sensing
Pins 23, 20 and 19 are the ISEN pins denoted ISEN1, ISEN2
and ISEN3 respectively. The resistors connected between
these pins and the phase nodes determine the gains in the
load-line regulation loop and the channel-current balance
loop. Select the values for these resistors based on the room
temperature r
DS(ON)
of the lower MOSFETs; the full-load
operating current, I
FL
; and the number of phases, N
according to Equation 13 (see also Figure 4).
In certain circumstances, it may be necessary to adjust the
value of one or more of the ISEN resistors. This can arise
when the components of one or more channels are inhibited
from dissipating their heat so that the affected channels run
hotter than desired (see the section entitled
Channel-Current
Balance
). In these cases, chose new, smaller values of R
ISEN
for the affected phases. Choose R
ISEN,2
in proportion to the
desired decrease in temperature rise in order to cause
proportionally less current to flow in the hotter phase.
In Equation 14, make sure that
T
2
is the desired temperature
rise above the ambient temperature, and
T
1
is the measured
temperature rise above the ambient temperature. While a
single adjustment according to Equation 14 is usually
sufficient, it may occasionally be necessary to adjust R
ISEN
two or more times to achieve perfect thermal balance
between all channels.
Load-Line Regulation Resistor
The load-line regulation resistor is labeled R
FB
in Figure 7.
Its value depends on the desired full-load droop voltage
(V
DROOP
in Figure 7). If Equation 13 is used to select each
ISEN resistor, the load-line regulation resistor is as shown
in Equation 15.
V
------------------------
=
If one or more of the ISEN resistors was adjusted for thermal
balance as in Equation 14, the load-line regulation resistor
should be selected according to Equation16 where I
FL
is the
full-load operating current and R
ISEN(n)
is the ISEN resistor
connected to the n
th
ISEN pin.
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in
Load-Line Regulation
, there are two distinct
methods for achieving these goals.
COMPENSATING A LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter L-C resonant frequency split with
the introduction of current information into the control loop.
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
C
and C
C
.
Since the system poles and zero are effected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
The feedback resistor, R
FB
, has already been chosen as out-
lined in
Load-Line Regulation Resistor
. Select a target band-
width for the compensated system, f
0
. The target bandwidth
must be large enough to assure adequate transient perfor-
mance, but smaller than 1/3 of the per-channel switching fre-
quency. The values of the compensation components
depend on the relationships of f
0
to the L-C pole frequency
and the ESR zero frequency. For each of the three cases
R
ISEN
r
50 10
6
)
–
-----------------------
I
-------
=
(EQ. 13)
R
ISEN 2
,
R
ISEN
T
2
T
1
----------
=
(EQ. 14)
R
FB
50 10
6
–
(EQ. 15)
R
FB
V
FL
DS ON
)
--------------------------------
R
ISEN n
( )
n
∑
=
(EQ. 16)
FIGURE 11. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6219A CIRCUIT
I
COMP
C
C
R
C
R
FB
FB
VSEN
-
+
V
DROOP
C
2
(OPTIONAL)
ISL6219A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL6219ACAZ | 功能描述:IC REG CTRLR BUCK PWM VM 28-QSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標準包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:500kHz 占空比:100% 電源電壓:8.2 V ~ 30 V 降壓:無 升壓:無 回掃:是 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:是 工作溫度:0°C ~ 70°C 封裝/外殼:8-DIP（0.300"，7.62mm） 包裝:管件 產(chǎn)品目錄頁面:1316 (CN2011-ZH PDF) |
| ISL6219ACAZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 28-QSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標準包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:500kHz 占空比:100% 電源電壓:8.2 V ~ 30 V 降壓:無 升壓:無 回掃:是 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:是 工作溫度:0°C ~ 70°C 封裝/外殼:8-DIP（0.300"，7.62mm） 包裝:管件 產(chǎn)品目錄頁面:1316 (CN2011-ZH PDF) |
| ISL6219CA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ISL6219CA-T | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL6220DWF2E WAF | 制造商:Harris Corporation 功能描述: |
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