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參數(shù)資料
| 型號： | ISL6219 |
| 廠商： | Intersil Corporation |
| 英文描述： | Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 20-TSSOP -40 to 85 |
| 中文描述： | 微處理器核心電壓調(diào)節(jié)精度多相降壓PWM控制器，用于移動應用 |
| 文件頁數(shù)： | 12/17頁 |
| 文件大?。?/td> | 476K |
| 代理商： | ISL6219 |
12
designs that include schematics, bills of materials, and
example board layouts for all common microprocessor
applications. See the application note
AN1018
for additional
information on applications of this controller.
Power Stages
The first step in designing a multi-phase converter is to
determine the number of phases. This determination
depends heavily on the cost analysis which in turn depends
on system constraints that differ from one design to the next.
Principally, the designer will be concerned with whether
components can be mounted on both sides of the circuit
board; whether through-hole components are permitted on
either side; and the total board space available for power-
supply circuitry. Generally speaking, the most economical
solutions will be for each phase to handle between 15 and
20A. All-surface-mount designs will tend toward the lower
end of this current range and, if through-hole MOSFETs can
be used, higher per-phase currents are possible. In cases
where board space is the limiting constraint, current can be
pushed as high as 30A per phase, but these designs require
heat sinks and forced air to cool the MOSFETs.
MOSFETs
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct; the switching frequency;
the capability of the MOSFETs to dissipate heat; and the
availability and nature of heat sinking and air flow.
LOWER MOSFET POWER CALCULATION
The calculation for heat dissipated in the lower MOSFET is
simple, since virtually all of the heat loss in the lower
MOSFET is due to current conducted through the channel
resistance (r
DS(ON)
). In Equation 7, I
is the maximum
continuous output current; I
L,PP
is the peak-to-peak inductor
current (see Equation 1); d is the duty cycle (V
OUT
/V
IN
); and
L is the per-channel inductance.
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I
M
, V
D(ON)
; the switching
frequency, f
S
; and the length of dead times, t
d1
and t
d2
, at
the beginning and the end of the lower-MOSFET conduction
interval respectively.
Thus the total power dissipated in each lower MOSFET is
approximated by the summation of P
L
and P
D
.
UPPER MOSFET POWER CALCULATION
In addition to r
DS(ON)
losses, a large portion of the upper-
MOSFET losses are due to currents conducted across the
input voltage (V
IN
) during switching. Since a substantially
higher portion of the upper-MOSFET losses are dependant
on switching frequency, the power calculation is somewhat
more complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times; the lower-MOSFET body-diode reverse-
recovery charge, Q
rr
; and the upper MOSFET r
DS(ON)
conduction loss.
When the upper MOSFET turns off, the lower MOSFET
does not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 9,
the required time for this commutation is t
1
and the
associated power loss is P
UP,1
.
Similarly, the upper MOSFET begins conducting as soon as
it begins turning on. In Equation 10, this transition occurs
over a time t
2
, and the approximate the power loss is P
UP,2
.
A third component involves the lower MOSFET’s reverse-
recovery charge, Q
rr
. Since the inductor current has fully
commutated to the upper MOSFET before the lower-
MOSFET’s body diode can recover all of Q
rr
, it is conducted
FIGURE 10. DYNAMIC-VID WAVEFORMS FOR 500KHz
ISL6219 BASED MULTI-PHASE BUCK
CONVERTER
5
μ
s/div
V
REF
, 100mV/div
V
OUT
, 100mV/div
1.5V
V
ID
, 5V/div
01110
00110
1.5V
VID CHANGE OCCURS
ANYWHERE HERE
P
LOW 1
,
r
DS ON
(
)
I
M
N
-----
2
1
d
–
(
)
I
,
-------------------------------
2
1
(
d
–
)
+
=
(EQ. 7)
P
LOW 2
,
V
D ON
)
f
S
I
M
N
-----
I
2
--------
+
t
d1
I
M
N
-----
I
2
--------
–
t
d2
+
=
(EQ. 8)
P
UP 1
,
V
IN
I
M
N
-----
I
,
-------------
+
t
1
2
----
f
S
≈
(EQ. 9)
P
UP 2
,
V
IN
I
M
N
-----
I
,
2
-------------
–
t
2
2
----
f
S
≈
(EQ. 10)
ISL6219
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PDF描述 |
|---|---|
| ISL6219CA | DB50 FEMALE SOLDER SHELL |
| ISL6223CA-T | Mobile Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
| ISL6223CA | Mobile Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
| ISL6223 | Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 20-TSSOP -40 to 85 |
| ISL6223EVAL1 | Mobile Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ISL6219 WAF | 制造商:Harris Corporation 功能描述: |
| ISL6219A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications |
| ISL6219A_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications |
| ISL6219ACA | 功能描述:IC REG CTRLR BUCK PWM VM 28-SSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標準包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
| ISL6219ACA-T | 功能描述:IC REG CTRLR BUCK PWM VM 28-SSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標準包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
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