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參數(shù)資料
| 型號： | ISL6219 |
| 廠商： | Intersil Corporation |
| 英文描述： | Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 20-TSSOP -40 to 85 |
| 中文描述： | 微處理器核心電壓調(diào)節(jié)精度多相降壓PWM控制器，用于移動應(yīng)用 |
| 文件頁數(shù)： | 10/17頁 |
| 文件大?。?/td> | 476K |
| 代理商： | ISL6219 |
10
OVERVOLTAGE PROTECTION
If the ISL6219 detects output voltages above 115% of VID,
the controller will immediately commands all PWM outputs
low. This directs the Intersil drivers to turn on the lower
MOSFETs and protect the load by preventing any further
increase in output voltage. Once the output voltage falls to
the level set by the VID code, the PWM outputs enter high-
impedance mode. The Intersil drivers respond by turning off
both upper and lower MOSFETs. If the overvoltage condition
reoccurs, the ISL6219 will again command the lower
MOSFETs to turn on. The ISL6219 will continue to protect
the load in this fashion as long as the overvoltage repeats.
After detecting an overvoltage condition, the ISL6219
terminated normal PWM operation until it is reset by power
cycle in which VCC is removed below the POR falling
threshold and restored above the POR rising threshold as
described in
Enable and Disable
and
Electrical
Specifications
.
Under-Voltage
The VSEN pin also detects when the CORE voltage falls
more than 18% below the VID programmed level. This
causes PGOOD to go low, but has no other effect on
operation and is not latched.
LOAD-LINE REGULATION
In applications with high transient current slew rates, the
lowest-cost solution for maintaining regulation often requires
some kind of controlled output impedance. The average
current of all active channels driven into FB pin. Average full
channel current is defined as 50
μ
A.
This forces I
AVG
into the
summing node of the error amplifier and produces a voltage
drop across the feedback resistor, R
FB
, proportional to the
output current. In Figure 7, the steady-state value of
V
DROOP
is simply
As I
AVG
increased (more current demand at output), the voltage
at
inverting node of error amplifier will be higher. This makes the
error amplifier adjusting the output voltage lower. Therefore, the
output voltage decreases as output current increases.
In the case that each channel uses the same value for R
ISEN
to
sense channel current, and this is almost always true, a more
complete expression for V
DROOP
can be determined from the
expression for I
AVG
as it is derived from Figures
4
and 5.
I
ENABLE AND DISABLE
The internal power-on reset circuit (POR) prevents the
ISL6219 from starting before the bias voltage at VCC
reaches the POR-rising threshold as defined in
Electrical
Specifications
.The POR level is high enough to guarantee
that all parts of the ISL6219 can perform their functions
properly. When VCC is below the POR-rising threshold, the
PWM outputs are held in a high-impedance state to assure
the drivers remain off.
ISL6219 has an optional enable feature. A PNP transistor
connects to pin 7 of ISL6219, as shown in Figure 8, can enable
or disable the IC. Connect the base of the PNP to a voltage
source which is greater than 1.23V plus the diode drop of PNP,
this will enable the IC. If connect it to ground, IC will disable.
1
0
0
1
0
1.400
1
0
0
0
1
1.425
1
0
0
0
0
1.450
0
1
1
1
1
1.475
0
1
1
1
0
1.500
0
1
1
0
1
1.525
0
1
1
0
0
1.550
0
1
0
1
1
1.575
0
1
0
1
0
1.600
0
1
0
0
1
1.625
0
1
0
0
0
1.650
0
0
1
1
1
1.675
0
0
1
1
0
1.700
0
0
1
0
1
1.725
0
0
1
0
0
1.750
0
0
0
1
1
1.775
0
0
0
1
0
1.800
0
0
0
0
1
1.825
0
0
0
0
0
1.850
TABLE 1. VOLTAGE IDENTIFICATION CODES (Continued)
VID4
VID3
VID2
VID1
VID0
VDAC
V
DROOP
I
AVG
R
FB
=
(EQ. 3)
I
AVG
-------------
r
ISEN
r
ISEN
(
)
----------------------
=
V
DROOP
I
-------------
)
----------------------
R
FB
=
(EQ. 4)
FIGURE 8. OPTIONAL ENABLE (EN) FUNCTION
EXTERNAL CIRCUIT
FSET/EN
+5V
+
-
1.23V
-
+
VCC
B
C
E
ENABLE
DISABLE
ISL6219
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISL6219CA | DB50 FEMALE SOLDER SHELL |
| ISL6223CA-T | Mobile Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
| ISL6223CA | Mobile Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
| ISL6223 | Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 20-TSSOP -40 to 85 |
| ISL6223EVAL1 | Mobile Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL6219 WAF | 制造商:Harris Corporation 功能描述: |
| ISL6219A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications |
| ISL6219A_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications |
| ISL6219ACA | 功能描述:IC REG CTRLR BUCK PWM VM 28-SSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標準包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
| ISL6219ACA-T | 功能描述:IC REG CTRLR BUCK PWM VM 28-SSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標準包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
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