參數(shù)資料
型號: ISL5586
廠商: Intersil Corporation
英文描述: Low Power Ringing SLIC for Home Gateways(家用網(wǎng)關(guān)的低功耗振鈴芯片)
中文描述: 低功耗振鈴用戶接口的家庭網(wǎng)關(guān)(家用網(wǎng)關(guān)的低功耗振鈴芯片)
文件頁數(shù): 19/19頁
文件大?。?/td> 206K
代理商: ISL5586
19
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
ASIA
Intersil Ltd.
8F-2, 96, Sec. 1, Chien-kuo North,
Taipei, Taiwan 104
Republic of China
TEL: 886-2-2515-8508
FAX: 886-2-2515-8369
ISL5586
Plastic Leaded Chip Carrier Packages (PLCC)
NOTES:
1. Controlling dimension: INCH. Converted millimeter dimensions are
not necessarily exact.
2. Dimensions and tolerancing per ANSI Y14.5M-1982.
3. Dimensions D1 and E1 do not include mold protrusions. Allowable
mold protrusion is 0.010 inch (0.25mm) per side. Dimensions D1
and E1 include mold mismatch and are measured at the extreme
material condition at the body parting line.
4. To be measured at seating plane
5. Centerline to be determined where center leads exit plastic body.
6. “N” is the number of terminal positions.
contact point.
-C-
A1
A
SEATING
PLANE
0.020 (0.51)
MIN
VIEW “A”
D2/E2
0.025 (0.64)
0.042 (1.07)
0.056 (1.42)
0.050 (1.27) TP
E
E1
0.042 (1.07)
0.048 (1.22)
PIN (1) IDENTIFIER
C
D1
D
0.020 (0.51) MAX
3 PLCS
0.026 (0.66)
0.032 (0.81)
0.045 (1.14)
MIN
0.013 (0.33)
0.021 (0.53)
0.025 (0.64)
MIN
VIEW “A” TYP.
0.004 (0.10)
C
-C-
D2/E2
C
N28.45
(JEDEC MS-018AB ISSUE A)
28 LEAD PLASTIC LEADED CHIP CARRIER PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.165
0.180
4.20
4.57
-
A1
0.090
0.120
2.29
3.04
-
D
0.485
0.495
12.32
12.57
-
D1
0.450
0.456
11.43
11.58
3
D2
0.191
0.219
4.86
5.56
4, 5
E
0.485
0.495
12.32
12.57
-
E1
0.450
0.456
11.43
11.58
3
E2
0.191
0.219
4.86
5.56
4, 5
N
28
28
6
Rev. 2 11/97
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISL5586_04 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power Ringing SLIC for Home Gateways
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ISL5586CIM 制造商:Harris Corporation 功能描述:
ISL5586DIM 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power Ringing SLIC for Home Gateways