參數(shù)資料
型號: ISL5586
廠商: Intersil Corporation
英文描述: Low Power Ringing SLIC for Home Gateways(家用網(wǎng)關的低功耗振鈴芯片)
中文描述: 低功耗振鈴用戶接口的家庭網(wǎng)關(家用網(wǎng)關的低功耗振鈴芯片)
文件頁數(shù): 15/19頁
文件大?。?/td> 206K
代理商: ISL5586
15
Note that in Figure 13, V
TR
is referenced on the line side of the
protection resistors.
On the 2-wire side, solving for IL in terms of V
IN
gives
Equation 49. Equations 50 and 51 show the relationship of
V
IN
to the outputs of the Sense Amplifier (V
SA
) and the
Feedback Amplifier (V
Z0
) respectively.
Simplifying Equation 51 in terms of Z
0
gives the following
equation.
The resulting differential output voltage V
TX4W
, is shown in
Equation 53.
Note that the gain from V
Z0
to the differential output is outside
the impedance synthesis loop and will have no effect on the
SLIC’s programmed impedance.
Substituting Equation 53 into Equation 52 and rearranging
terms gives the gain from the 2-wire source (V
IN
) to the
differential output of the Transmit Amplifier.
If the combination of the protection resistors and the
programmed impedance of the SLIC are equal to Z
L
the
voltage V
TR
will be 1/2 V
IN
. The 2-wire to 4-wire gain is
defined by Equation 55.
4-WIRE TO 4-WIRE GAIN
The 4-Wire to 4-Wire gain is defined in Equation 56 and is
illustrated in Figure 14.The first term is identical to
Equation 48.
The second term is derived in a similar manner as the 2-wire
to 4-wire gain starting with Equation 57.
Moving around the loop from the 2-wire side to the 4-wire
output we solve for V
SA
and V
ZO
.
V
L
The relationship between V
Z0
and the 4-wire output is
shown in Equation 53. Substituting Equation 59 into
Equation 53 yields Equation 60, the second term in Equation
56.
FIGURE 12. SCHEMATIC FOR 4-WIRE TO 2-WIRE GAIN DERIVATION
Irx4w
TIP
RING
-IN
V
ZO
200K
+
-
+
+
1:1
20
20
3R
4R
4R
4R
4R
3R
8K
R
S
C
FB
T
A
V
SA
I
L
V
tr
+
-
V
RXM
V
RXP
V
RX4W
1.4R
R
R
1.4R
V
2W
R
P
R
P
V
FB
Z
L
V
RX
+
-
200K
200K
200K
Iz0
+-
+
-
IL
V
0
L
2R
P
+
--------+
=
(EQ. 49)
V
SA
V
0
L
2R
P
+
--------+
2
20
×
×
×
=
(EQ. 50)
V
Z0
V
0
L
2R
P
+
--------+
2
20
×
×
×
R
------------
×
=
(EQ. 51)
V
Z0
V
0
L
2R
P
+
--------+
Z
0
2
------
×
=
(EQ. 52)
V
TX4W
V
TXP
V
TXM
V
Z0
V
(
Z0
)
2V
Z0
=
=
=
(EQ. 53)
V
IN
-------------------
Z
0
L
2R
P
+
--------+
=
(EQ. 54)
V
TR
-------------------
2Z
0
L
2R
P
+
--------+
=
(EQ. 55)
V
RX4W
--------------------
V
RX4W
--------------------
V
2W
-------------------
×
=
(EQ. 56)
V
2W
IL
Z
L
×
=
(EQ. 57)
V
SA
I
L
2
20
×
3
4
--
×
×
-----------
40
3
4
--
×
×
=
=
(EQ. 58)
V
Z0
V
L
-----------
R
------------
×
40
3
4
--
×
×
V
L
-----------
Z
0
2
------
×
=
=
(EQ. 59)
V
2W
-------------------
Z
0
Z
L
------
=
(EQ. 60)
ISL5586
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