參數(shù)資料
型號: ISL5216KI-1Z
廠商: INTERSIL CORP
元件分類: 無繩電話/電話
英文描述: Four-Channel Programmable Digital DownConverter
中文描述: TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA196
封裝: 15 X 15 MM, 1 MM PITCH, ROHS COMPLIANT, PLASTIC, BGA-196
文件頁數(shù): 8/65頁
文件大?。?/td> 1076K
代理商: ISL5216KI-1Z
8
July 8, 2005
point modes. The floating point modes and the mapping of the
parallel 17-bit input format is discussed below.
Floating Point Input Mode Bit Mapping
The input bit weighting for fixed point inputs on busses A, B,
C, and D is:
bit 15 (MSB): 2
0
, bit 14: 2
-1
, bit 13: 2
-2
, ..., bit 0: 2
-15
.
For floating point modes, the least significant two or three
bits are used as exponent bits (See
Floating Point Input
Mode Bit Mapping Tables
).
The first three floating point modes shown below are
included for backward compatibility with the HSP50216 and
their functionality remains unchanged. The 14-bit mantissa /
2-bit exponent mode present in the HSP50216 has been
extended from a 12dB range to 18dB in the ISL5216. This
mode as well as those which follow it in the tables below use
the CIC’s barrel shifter to provide the gain. This places a limit
on the CIC’s largest available decimation. As an example,
assume the CIC is set for 5th order and the decimation
needs to be 300. The CIC’s gain, 300
5
, is compensated for
in the barrel shifter with a shift factor of 45 - ceil(log
2
(300
5
)) =
3 where shifts are from LSB towards MSB and a shift of 45
corresponds to no attenuation. If the shift factor is set as 0 in
this example, there is room for 3 * 6 = 18dB of gain. Raising
the CIC decimation lowers the shift factor (to further
attenuate the CIC input signal) and limits the available gain
range. This CIC decimation / floating point gain range trade
off is handled automatically by the evaluation board
software. Additional information on the CIC can be found in
the CIC Filter section of this data sheet.
Floating Point Input Mode Bit Mapping Tables
((
11-BIT MODE: 11 TO 13-BIT MANTISSA (15:3), 3-BIT EXPONENT (2:0), 30dB EXPONENT RANGE (Note 3)
EXPONENT
GAIN (dB)
PIN BIT WEIGHTING TO 16-BIT INPUT MAPPING
X(2:0) = 000
0
X15
X15
X15
X15
X15
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X(2:0) = 001
6
X15
X15
X15
X15
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X4
X(2:0) = 010
12
X15
X15
X15
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X4
X3
X(2:0) = 011
18
X15
X15
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X4
X3
0
X(2:0) = 100
24
X15
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X4
X3
0
0
X(2:0) = 101
(Note 1)
30
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X4
X3
0
0
0
NOTES:
1. Or 110 or 111, the exponent input saturates at 101.
2. “Xnn” = input A, B, C, or D bit nn.
3. To select this mode, set IWA *000H / GWA F804H bits 17, 16, 8 and 7 to 0.
12-BIT MODE: 12 TO 13-BIT MANTISSA (15:3), 3-BIT EXPONENT (2:0), 24dB EXPONENT RANGE (Note 5)
EXPONENT
GAIN (dB)
PIN BIT WEIGHTING TO 16-BIT INPUT MAPPING
X(2:0) = 000
0
X15
X15
X15
X15
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X4
X(2:0) = 001
6
X15
X15
X15
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X4
X3
X(2:0) = 010
12
X15
X15
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X4
X3
0
X(2:0) = 011
18
X15
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X4
X3
0
0
X(2:0) = 100
(Note 4)
24
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
X4
X3
0
0
0
NOTES:
4. Or 101, 110, or 111, the exponent input saturates at 100.
5. To select this mode, set IWA *000H / GWA F804H bits 17, 16, 8 and 7 to 0, 0, 0 and 1 respectively.
ISL5216
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