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參數(shù)資料
| 型號(hào)： | ISL43L122 |
| 廠商： | Intersil Corporation |
| 英文描述： | Ultra Low ON-Resistance, Single Supply, Dual SPST Analog Switches(超低導(dǎo)通電阻, 單電源, 雙路單刀單擲模擬開關(guān)) |
| 中文描述： | 超低電阻，單電源，雙路SPST模擬開關(guān)（超低導(dǎo)通電阻，單電源，雙路單刀單擲模擬開關(guān)） |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 270K |
| 代理商： | ISL43L122 |
7
FN6091.2
June 23, 2006
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low R
ON
switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 7). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
unaffected by this approach, but the switch signal range is
reduced and the resistance may increase, especially at low
supply voltages.
Power-Supply Considerations
The ISL43L12x construction is typical of most single supply
CMOS analog switches, in that they have two supply pins:
V+ and GND. V+ and GND drive the internal CMOS
switches and set their analog voltage limits. Unlike switches
with a 4V maximum supply voltage, the ISL43L12X 4.7V
maximum supply voltage provides plenty of room for the
10% tolerance of 3.6V supplies, as well as room for
overshoot and noise spikes.
The minimum recommended supply voltage is 1.65V but the
part will operate with a supply below 1.5V. It is important to
note that the input signal range, switching times, and on-
resistance degrade at lower supply voltages. Refer to the
electrical specification tables and
Typical Performance
curves for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.5V and 1.4V)
over a supply range of 2V to 3.6V (see Figure 14). At 3.6V
the V
IH
level is about 1.27V. This is still below the 1.8V
CMOS guaranteed high output minimum level of 1.4V, but
noise margin is reduced.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50
systems, signal response is reasonably flat even past
20MHz with a -3dB bandwidth of 175MHz (see Figure 15).
The frequency response is very consistent over a wide V+
range, and for varying analog signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off Isolation is
the resistance to this feedthrough, while Crosstalk indicates
the amount of feedthrough from one switch to another.
Figure 16 details the high Off Isolation and Crosstalk
rejection provided by this family. At 100kHz, Off Isolation is
about 62dB in 50
systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
impedances decrease Off Isolation and Crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analog-
signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and V+ or GND.
FIGURE 7. OVERVOLTAGE PROTECTION
GND
V
COM
V
NO or NC
OPTIONAL PROTECTION
DIODE
V+
IN
X
OPTIONAL PROTECTION
DIODE
OPTIONAL
PROTECTION
RESISTOR
ISL43L120, ISL43L121, ISL43L122
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