30 FN6667.5 December 13, 2011 The Enable bit (DSTE) is in the Month forward register, so the BCD value for that register is altered w" />
參數(shù)資料
型號(hào): ISL12020MIRZ-T7A
廠商: Intersil
文件頁(yè)數(shù): 24/34頁(yè)
文件大?。?/td> 0K
描述: IC RTC/CALENDAR TEMP SNSR 20DFN
產(chǎn)品培訓(xùn)模塊: Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝: 250
類型: 時(shí)鐘/日歷
特點(diǎn): 警報(bào)器,夏令時(shí),閏年,SRAM
存儲(chǔ)容量: 128B
時(shí)間格式: HH:MM:SS(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 2.7 V ~ 5.5 V
電壓 - 電源,電池: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-LFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 20-DFN(5.5x4.0)
包裝: 帶卷 (TR)
ISL12020M
30
FN6667.5
December 13, 2011
The Enable bit (DSTE) is in the Month forward register, so the BCD
value for that register is altered with the additional bit. The Week
and Day values along with Week/Day vs Date select bit is in the
Week/Day register, so that value is also not straight BCD. Hour
and Month are normal BCD, but the Hour doesn’t use the MIL bit
since Military time PM values are already discretely different
from AM/PM time PM values. The DST reverse setting utilizes the
option to select the last week of the month for October, which
could have 4 or 5 weeks but needs to have the time change on
the last Sunday.
Note that the DSTADJ bit in the status register monitors whether
the DST forward adjustment has happened. When it is “1”, DST
forward has taken place. When it is “0”, then either DST reverse
has happened, or it has been reset either by initial power-up or if
the DSTE bit has been set to “0”.
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