參數(shù)資料
型號: ISD5216SERIES
英文描述: Single-Chip Voice Record/Playback Device
中文描述: 單芯片語音記錄/播放設(shè)備
文件頁數(shù): 5/83頁
文件大小: 758K
代理商: ISD5216SERIES
I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
-5
Revision A1
PIN DESCRIPTION
Pin Name
Pin No.
28-pin
TSOP
4
Pin No.
28-pin
PDIP
25
Pin No.
28-pin
SOIC
25
Functionality
RAC
Row Address Clock; an open drain output. The RAC pin goes LOW
T
RACLO
at exactly the end of each row of memory.
Interrupt Output; an open drain output indicating that a set EOM bit
has been found during Playback, or that the chip is in an Overflow
(OVF) condition. This pin remains LOW until a Read Status
command is executed.
This pin allows the internal clock of the Voice record/playback
system to be externally driven for enhanced timing precision. This
pin is grounded for most applications. It is required for the CODEC
operation.
Serial Clock Line is part of the I
2
C serial bus. It is used to clock the
data into and out of the I
2
C interface.
Serial Data Line is part of the I
2
C serial bus. Data is passed
between devices on the bus over this line.
Input pin that supplies the LSB for the I
2
C Slave Address.
Input pin that supplies the LSB +1 bit for the I
2
C Slave Address.
Differential positive Input to the microphone amplifier.
Differential negative Input to the microphone amplifier.
Microphone Bias Voltage
AGC Capacitor connection. Required for the on-chip AGC amplifier.
Differential Positive Speaker Driver Output.
Differential Negative Speaker Driver Output. When the speaker
outputs are in use, the AUX OUT output is disabled.
Auxiliary Input. This is one of the gain adjustable analog inputs for
the device.
Auxiliary Output. This is one the analog outputs for the device.
When this output is in use, the SP+ and SP- outputs are disabled.
Serial Digital Audio PCM Input.
Serial Digital Audio PCM Output or I
2
S Input/Output.
Digital audio PCM Frame sync (FS) or I
2
S Word Sync (WS).
Digital audio PCM or I
2
S Serial Clock.
Positive Digital Supply pins. These pins carry noise generated by
internal clocks in the chip. They must be carefully bypassed to
Digital Ground to ensure correct device operation.
Digital Ground pins.
Analog Ground pins.
Positive Analog Supply pin. This pin supplies the low level audio
sections for the device. It should be carefully bypassed to Analog
Ground to ensure correct device operation.
No Connection
before the end of each row of memory, and returns HIGH
/INT
5
26
26
MCLK
6
27
27
SCL
9
2
2
SDA
11
4
4
A0
A1
MIC+
MIC-
MICBS
ACAP
SP+
SP-
12
10
16
17
18
19
22
20
5
3
9
10
11
12
15
13
7
3
10
9
8
12
15
13
AUX IN
24
17
17
AUX OUT
25
18
20
SDI
SDIO
WS
SCK
V
CCD
2
3
28
27
7,8
23
24
21
20
1,28
22
24
18
19
1,28
V
SSD
V
SSA
V
CCA
13,14
1,15,21
23
6,7
5,6
8,14,22
16
11,14,23
16
NC
26
19
21
1
See parameters section of the datasheet.
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