參數(shù)資料
型號(hào): ISD5216SERIES
英文描述: Single-Chip Voice Record/Playback Device
中文描述: 單芯片語音記錄/播放設(shè)備
文件頁數(shù): 24/83頁
文件大?。?/td> 758K
代理商: ISD5216SERIES
I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
-24
Revision A1
1
See
Playback and Stop Cycle
on page 62 for details.
DATABYTES
In the I
2
C write mode, the device can accept data sent after the command byte. If a register load option
is selected, the next two bytes are loaded into the selected register. The format of the data is MSB first,
as specified by the I
C standard. Thus to load DATA<15:0> into the device, DATA<15:8> is sent first,
the byte is acknowledged, and DATA<7:0> is sent next. The address register consists of two bytes.
The format of the address is as follows:
ADDRESS<15:0> = PAGE_ADDRESS<10:0>, BLOCK_ADDRESS<4:0>
If an analog function is selected, the block address bits must be set to 00000. Digital Read and Write
are block addressable.
When the device is polled with the Read Status command, it will return three bytes of data. The first
byte is the status byte, the next is the upper address byte and the last is the lower address byte. The
status register is one byte long and its bit function is:
STATUS<7:0> = EOM, OVF, READY, PD, PRB, DEVICE_ID<2:0>
The lower address byte will always return the block address bits as zero, either in digital or analog
mode.
The functions of the bits are:
BIT#
7
NAME
EOM
FUNCTION
Indicates whether an EOM interrupt has occurred.
6
OVF
Indicates whether an overflow interrupt has occurred.
5
READY
Indicates the internal status of the device – if READY is LOW no new
commands should be sent to device.
4
PD
Device is powered down if PD is HIGH.
3
PRB
Play/Record mode indicator. HIGH=Play/LOW=Record.
2
1
0
DEVICE_ID
An internal device ID. This is 001 for the I5216.
It is good practice to read the status register after a Write or Record operation to ensure that the
device is ready to accept new commands. Depending upon the design and the number of pins
available on the controller, the polling overhead can be reduced. If INT\ and RAC are tied to the
microcontroller, the controller does not have to poll as frequently to determine the status of the I5216
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