參數(shù)資料
型號(hào)： ISD-300A1
英文描述： Universal Serial Bus
中文描述： 通用串行總線
文件頁(yè)數(shù)： 4/67頁(yè)
文件大?。?/td> 580K
代理商： ISD-300A1
ISD-300A1
iii
October 19, 2001
Table of Tables
Table 1 –Document Revision History............................................................................................................ 1
Table 2 – Pin Descriptions ............................................................................................................................. 5
Table 3 – ISD-300A1 Configuration and Descriptor Sources........................................................................ 8
Table 4 – ISD-300A1 Configuration Bytes.................................................................................................. 14
Table 5 – Device Descriptor......................................................................................................................... 16
Table 6 – Device Qualifier Descriptor.......................................................................................................... 16
Table 7 – Standard Configuration Descriptor(s)........................................................................................... 17
Table 8 – Other Speed Configuration Descriptor(s)..................................................................................... 18
Table 9 – HS and FS Interface Descriptor(s)................................................................................................ 19
Table 10 – String Descriptors....................................................................................................................... 21
Table 11 – Mass Storage Class Bulk-Only Requests ................................................................................... 22
Table 12 – Vendor-Specific Requests .......................................................................................................... 23
Table 13 – LOAD_MFG_DATA Data Block Bit Map................................................................................ 26
Table 14 – READ_MFG_DATA Data Block Bit Map ................................................................................ 27
Table 15 – ATA Command Block Formatting............................................................................................. 30
Table 16 – Vendor-Specific ATA Commands ............................................................................................. 35
Table 17 - Identification Register Writes ..................................................................................................... 35
Table 18 - Identification Register Reads...................................................................................................... 35
Table 19 – Event Notify ATA Command..................................................................................................... 36
Table 20 - Event Notify Drive Status........................................................................................................... 37
Table 21 – ATA Interface Line States.......................................................................................................... 40
Table 22 – USB Interrupt Pipe Data............................................................................................................. 41
Table 23 – Test Modes................................................................................................................................. 43
Table 24 – Absolute Maximum Ratings....................................................................................................... 46
Table 25 – Voltage Characteristics............................................................................................................... 47
Table 26 – Power Supply Current Characteristics........................................................................................ 47
Table 27 – I
2
C Memory Device Interface Timing........................................................................................ 48
Table 28 – SYS_IRQ Interface Timing........................................................................................................ 49
Table 29 – Clock Requirements ................................................................................................................... 49
Table 30 – Example I
2
C memory device
/ FBh Identify Data...................................................................... 62
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