
ISD-300A1
14
October 19, 2001
Address
Field Name
Description
On-board
ROM Defaults
0xD
PIO Mode Selection
Skip Pin Reset
General Purpose IO
General Purpose IO 3-
state control
Bits (7:5)
PIO Mode Selection. The PIO mode reported back to the device if the
Override PIO Timing configuration bit is set. This field represents the PIO
mode of operation configured by the ATA Data Setup, ATA Data Assertion,
ATA Data Recover, and Override PIO Timing fields.
mode 0 000
mode 1 001
mode 2 010
mode 3 011
mode 4 100
Bit (4)
Skip ATA_NRESET assertion.
Note:
SRST Enable must be set in
conjunction with Skip Pin Reset
. Setting this bit causes the Initialize
algorithm to bypass ATA_NRESET assertion unless a DISK_READY 0=>1
event occurred. All other reset events utilize SRST as the drive reset
mechanism.
0
Allow ATA_NRESET assertion for all resets
1
Disable ATA_NRESET assertion except for drive power-on reset
cycles
Bits (3:2)
GPIO[9:8] input / output control
Writing this register controls the output state of the GPIO pin (if the 3-state
control is enabled)
Reading this register returns the logic value from the GPIO pin
Bits (1:0)
GPIO[9:8] 3-state control
0 Output enabled (GPIO pin is an output)
1 3-state(hi-Z) (GPIO pin is an input)
Bits(7:0)
GPIO[7:0] input / output control
Writing this register controls the output state of the GPIO pin (if the 3-state
control is enabled)
Reading this register returns the logic value from the GPIO pin
Bits(7:0)
GPIO[7:0] 3-state control
0 Output enabled (GPIO pin is an output)
1 3-state (hi-Z) (GPIO pin is an input)
0x03
0xE
General Purpose IO
0x00
0xF
General Purpose IO 3-
state control
0xFF
Table 4 – ISD-300A1 Configuration Bytes
USB Interface
The ISD-300A1 is electrically and logically compliant with the
Universal Serial Bus Specification Revision
2.0
.
Descriptors
Supported Descriptors
Device
USB Device Qualifier
The ISD-300A1 requires only one Device Qualifier descriptor. The information returned is
identical for full and high speed modes of operation.