參數(shù)資料
型號: IDT82V2082BFG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 5/88頁
文件大?。?/td> 0K
描述: IC LIU T1/E1/J1 2CH 81BGA
標(biāo)準(zhǔn)包裝: 360
類型: 線路接口裝置(LIU)
規(guī)程: T1,E1,J1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 81-LFBGA
供應(yīng)商設(shè)備封裝: 81-CABGA(8x8)
包裝: 托盤
IDT82V2082
DUAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
PIN DESCRIPTION
13
May 4, 2009
MODE1
MODE0
I9
10
E2
D3
MODE[1:0]: operation mode of control interface select
The level on this pin determines which control mode is used to control the device as follows:
The serial microcontroller interface consists of CS, SCLK, SCLKE, SDI, SDO and INT pins. SCLKE is used for the
selection of the active edge of SCLK.
The parallel non-multiplexed microcontroller interface consists of CS, A[5:0], D[7:0], DS/RD, R/W/WR and INT
pins. (Refer to 3.12 MICROCONTROLLER INTERFACES for details)
Hardware interface consists of PULSn[3:0], THZ, RCLKE, LPn[1:0], PATTn[1:0], JA[1:0], MONTn, TERMn, EQn,
RPDn, MODE[1:0] and RXTXM[1:0] (n=1, 2).
RCLKE
I
11
D4
RCLKE: the active edge of RCLKn select
In hardware control mode, this pin selects the active edge of RCLKn
L= update RDPn/RDNn on the rising edge of RCLKn
H= update RDPn/RDNn on the falling edge of RCLKn
In software control mode, this pin should be connected to GNDIO.
RXTXM1
RXTXM0
I14
15
E4
F1
RXTXM[1:0]: Receive and transmit path operation mode select
In hardware control mode, these pins are used to select the single rail or dual rail operation modes as well as AMI or
HDB3/B8ZS line coding:
00= single rail with HDB3/B8ZS coding
01= single rail with AMI coding
10= dual rail interface with CDR enabled
11= slicer mode (dual rail interface with CDR disabled)
In software control mode, these pins should be connected to ground.
CS
LP11
I42
G8
CS: Chip Select
In serial or parallel microcontroller interface mode, this is the active low enable signal. A low level on this pin enables
serial or parallel microcontroller interface.
LP11/LP10: Loopback mode select for channel 1
When the chip is configured by hardware, this pin is used to select loopback operation modes for channel 1 (Inband Loop-
back is not provided in hardware control mode).
00 = no loopback
01 = analog loopback
10 = digital loopback
11 = remote loopback
INT
LP10
O
I
41
G9
INT: Interrupt Request
In software control mode, this pin outputs the general interrupt request for all interrupt sources. If INTM_GLB bit (GCF,
20H) is set to ‘1’, all the interrupt sources will be masked. These interrupt sources can be masked individually via registers
(INTM0, 13H...) and (INTM1, 14H...). The interrupt status is reported via the registers (INTCH, 21H), (INTS0, 18H...) and
(INTS1, 19H...).
Output characteristics of this pin can be defined to be push-pull (active high or active low) or open-drain (active low) by
setting bits INT_PIN[1:0] (GCF, 20H)
LP11/LP10: Loopback mode select for channel 1
See above LP11.
Table-1 Pin Description (Continued)
Name
Type
TQFP80
Pin No.
FPBGA81
Pin No.
Description
MODE[1:0]
Control Interface mode
00
Hardware interface
01
Serial Microcontroller Interface
10
Motorola non-multiplexed
11
Intel non-multiplexed
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