參數(shù)資料
型號： IDT82V2048LBBG
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 11/48頁
文件大?。?/td> 0K
描述： IC LIU T1/E1 8CH SHORT 160-BGA
標準包裝： 14
類型： 線路接口裝置（LIU）
規(guī)程： E1
電源電壓： 3.13 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 160-BGA
供應(yīng)商設(shè)備封裝： 160-PBGA（15x15）
包裝： 托盤
其它名稱： 82V2048LBBG
19
IDT82V2048L OCTAL T1/E1 SHORT HAUL ANALOG FRONT END
INDUSTRIAL TEMPERATURE RANGES
2.19 INTERRUPT HANDLING
2.19.1 INTERRUPT SOURCES
There are two kinds of interrupt sources:
1. Status change in register LOS. The analog/digital loss of signal
detector continuously monitors the received signal to update the
specific bit in register LOS which indicates presence or absence
of a LOS condition.
2. Status change in register DF. The automatic power driver circuit
continuously monitors the output drivers signal to update the
specific bit in register DFM which indicates presence or absence
of an output driver short circuit condition.
Figure-11 Interrupt Service Routine
2.19.2 INTERRUPT ENABLE
The IDT82V2048L provides a latched interrupt output (INT) and the
two kinds of interrupts are all reported by this pin. When the Interrupt
Mask register: LOSM and DFM, are set to ‘1’, the Interrupt Status
register: LOSI and DFI, are enabled respectively. Whenever there is a
transition (‘0’ to ‘1’ or ‘1’ to ‘0’) in the corresponding status register, the
Interrupt Status register will change into ‘1’, which means an interrupt
occurs, and there will be a high to low transition on INT pin. An external
pull-up resistor of approximately 10 k
is required to support the wire-
OR operation of INT. When any of the two Interrupt Mask registers is set
to ‘0’ (the power-on default value is ‘0’), the corresponding Interrupt
Status register is disabled and the transition on status register is
ignored.
2.19.3 INTERRUPT CLEARING
When an interrupt occurs, the Interrupt Status registers: LOSI and
DFI, are read to identify the interrupt source. These registers will be
cleared to ‘0’ after the corresponding status registers: LOS and DF are
read. The Status registers will be cleared once the corresponding condi-
tions are met.
Pin INT is pulled high when there is no pending interrupt left. The
interrupt handling in the interrupt service routine is shown in Figure-11.
Service the Interrupt
Read Interrupt Status Register
Read Corresponding Status
Register
Interrupt Allowed
Interrupt Condition
Exist?
Yes
No
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