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參數(shù)資料
型號(hào): IDT82P2521BHG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 136/147頁
文件大小: 0K
描述: IC LIU E1 21+1CH SHORT 640-PBGA
標(biāo)準(zhǔn)包裝: 5
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 640-BGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 640-PBGA-EP(31x31)
包裝: 托盤
其它名稱: 82P2521BHG
IDT82P2521
21(+1) CHANNEL HIGH-DENSITY E1 LINE INTERFACE UNIT
Programming Information
89
December 7, 2005
TCF1 - Transmit Configuration Register 1
Address: 005H, 045H, 085H, 0C5H, 105H, 145H, 185H, 1C5H, (CH1~CH8)
205H, 245H, 285H, 2C5H, 305H, 345H, 385H, 3C5H, (CH9~CH16)
405H, 445H, 485H, 4C5H, 505H, (CH17~CH21)
7C5H (CH0)
Type: Read / Write
Default Value: 01H
Bit
Name
Description
7 - 5
TMF_DEF[2:0] These bits are valid only in Transmit Dual Rail RZ Format mode and Transmit Single Rail NRZ Format mode. They determine the
indication on the TMFn pin.
000: PRBS/ARB indication when the PRBS/ARB detection is switched to the transmit path. Or reserved when the PRBS/ARB
detection is switched to the receive path. (default)
001: SAIS indication.
010: TOC indication.
011: TLOS indication.
100: SEXZ indication.
101: SBPV indication in Transmit Dual Rail RZ Format mode. Reserved in Transmit Single Rail NRZ Format mode.
110: SEXZ + SBPV indication in Transmit Dual Rail RZ Format mode. Reserved in Transmit Single Rail NRZ Format mode.
111: SLOS indication in Transmit Dual Rail RZ Format mode. Reserved in Transmit Single Rail NRZ Format mode.
4
TCK_ES
This bit selects the active edge of the TCLKn pin.
0: Falling edge. (default)
1: Rising edge.
3
TD_INV
This bit determines the active level on the TDn, TDPn and TDNn pins.
0: Active high. (default)
1: Active low.
2
T_CODE
This bit selects the line code rule for the transmit path.
0: HDB3. (default)
1: AMI.
1 - 0
T_MD[1:0]
These bits determines the transmit system interface.
00: Transmit Single Rail NRZ Format system interface. The data is input on TDn in NRZ format and a 2.048 MHz clock is input on
TCLKn.
01: Transmit Dual Rail NRZ Format system interface. The data is input on TDPn and TDNn in NRZ format and a 2.048 MHz clock
is input on TCLKn. (default)
10: Transmit Dual Rail RZ Format system interface. The data is input on TDPn and TDNn in RZ format.
11: Reserved.
7
654
32
1
0
TMF_DEF2
TMF_DEF1
TMF_DEF0
TCK_ES
TD_INV
T_CODE
T_MD1
T_MD0
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