參數(shù)資料
型號(hào): IDT74LVC161ADC8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 計(jì)數(shù)器
英文描述: LVC/LCX/Z SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16
封裝: SOIC-16
文件頁數(shù): 4/7頁
文件大?。?/td> 194K
代理商: IDT74LVC161ADC8
INDUSTRIALTEMPERATURERANGE
4
IDT74LVC161A
3.3VCMOSPRESETTABLE SYNCHRONOUS 4-BIT BINARY COUNTER
Symbol
Parameter
Test Conditions
Min.
Typ.(1)
Max.
Unit
VIH(2)
Input HIGH Voltage Level
VCC = 2.3V to 2.7V
1.7
V
VCC = 2.7V to 3.6V
2
VIL
Input LOW Voltage Level
VCC = 2.3V to 2.7V
0.7
V
VCC = 2.7V to 3.6V
0.8
IIH
Input Leakage Current
VCC = 3.6V
VI = 0 to 5.5V
±5A
IIL
IOZH
High Impedance Output Current
VCC = 3.6V
VO = 0 to 5.5V
±10
A
IOZL
(3-State Output pins)
IOFF
Input/Output Power Off Leakage
VCC = 0V, VIN or VO
5.5V
±50
A
VIK
Clamp Diode Voltage
VCC = 2.3V, IIN = –18mA
–0.7
–1.2
V
VH
Input Hysteresis
VCC = 3.3V
100
mV
ICCL
Quiescent Power Supply Current
VCC = 3.6V, VIN = GND or VCC
——
10
A
ICCH
ICCZ
ICC
Quiescent Power Supply Current
One input at VCC - 0.6V, other inputs at VCC or GND
500
A
Variation
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Operating Condition: TA = –40°C to +85°C
NOTES:
1. Typical values are at VCC = 3.3V, +25°C ambient.
2. Clock Pin (CP) requires a minimum VIH of 2.5V.
FUNCTION TABLE (1)
OPERATING
INPUTS
OUTPUTS
MODES
MR
CP
CEP
CET
PE
Dx
Qx
TC
Reset(clear)
L
X
L
Parallelload
H
XX
l
L
H
XX
l
h
H
*
Count
H
h
X
count
*
Hold
H
X
l
X
h
X
Q(2)
*
(donothing)
H
X
l
h
X
Q(2)
L
NOTE:
1. H = HIGH Voltage Level
h = HIGH Voltage level one setup time prior to the LOW-to-HIGH clock transition.
L = LOW Voltage Level
l = LOW Voltage level one setup time prior to the LOW-to-HIGH clock transition.
X = Don’t care
* = The TC output is HIGH when CET is HIGH and the counter is at Terminal Count (HHHH).
↑ = LOW-to-HIGH clock transition
2. Indicates the state of the referenced output one set up time prior to the LOW-to-HIGH clock transition.
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