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COMMERCIALTEMPERATURERANGE
IDT72V3654/72V3664/72V3674 3.3V CMOS SyncBiFIFOTM WITH BUS-MATCHING
2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2
SIZE MODE(1)
WRITE
DATA WRITTEN
DATA READ FROM FIFO2
NO.
TO FIFO2
BM
SIZE
BE
B17-B9
B8-B0
A35-A27
A26-A18
A17-A9
A8-A0
HL
H
A
B
C
D
HL
L
A
B
C
D
DATA SIZE TABLE FOR WORD WRITES TO FIFO2
1A
B
2C
D
1C
D
2A
B
Figure 9. Port B Word Write Cycle Timing for FIFO2 (IDT Standard and FWFT Modes)
NOTE:
1. BE is selected at Master Reset; BM and SIZE must be static throughout device operation.
SIZE MODE(1)
WRITE
DATA WRITTEN
DATA READ FROM FIFO2
NO.
TO FIFO2
BM
SIZE
BE
B8-B0
A35-A27
A26-A18
A17-A9
A8-A0
HH
H
A
B
C
D
HH
L
A
B
C
D
1
A
2
B
3
C
4
D
1
D
2
C
3
B
4
A
DATA SIZE TABLE FOR BYTE WRITES TO FIFO2
Figure 10. Port B Byte Write Cycle Timing for FIFO2 (IDT Standard and FWFT Modes)
NOTE:
1. BE is selected at Master Reset; BM and SIZE must be static throughout device operation.
CLKB
ENB
tENH
FFB/IRB
W/RB
CSB
tENH
HIGH
4664 drw 11
B0-B17
tENH
MBB
tDH
tDS
tENS2
tENS1
tENS2
FFB/IRB
CSB
W/RB
CLKB
tENH
tENS2
ENB
4664 drw 12
HIGH
B0-B8
tENS2
tENH
tENS2
tENH
tDS
tDH
tENS1
tENH
MBB