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參數(shù)資料
| 型號(hào)： | IDT7208L35P |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 1/14頁(yè) |
| 文件大小： | 0K |
| 描述： | IC FIFO 64KX9 35NS 28DIP |
| 產(chǎn)品變化通告： | Product Discontinuation 26/Apr/2010 |
| 標(biāo)準(zhǔn)包裝： | 13 |
| 系列： | 7200 |
| 功能： | 異步 |
| 存儲(chǔ)容量： | 576K（64K x 9） |
| 數(shù)據(jù)速率： | 22.22MHz |
| 訪問(wèn)時(shí)間： | 35ns |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 28-DIP（0.600"，15.24mm） |
| 供應(yīng)商設(shè)備封裝： | 28-PDIP |
| 包裝： | 管件 |
| 其它名稱： | 7208L35P |
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DSC-2661/18
2012 Integrated Device Technology, Inc. All rights reserved. Product subject to change without notice.
JUNE 2012
CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9
8,192 x 9, 16,384 x 9
32,768 x 9 and 65,536 x 9
IDT7203
IDT7204
IDT7205
IDT7206
IDT7207
IDT7208
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
COMMERCIAL,MILITARYANDINDUSTRIALTEMPERATURERANGES
FEATURES:
First-In/First-Out Dual-Port memory
2,048 x 9 organization (IDT7203)
4,096 x 9 organization (IDT7204)
8,192 x 9 organization (IDT7205)
16,384 x 9 organization (IDT7206)
32,768 x 9 organization (IDT7207)
65,636 x 9 organization (IDT7208)
High-speed: 12ns access time
Low power consumption
— Active: 660mW (max.)
— Power-down: 44mW (max.)
Asynchronous and simultaneous read and write
Fully expandable in both word depth and width
720x family is pin and functionally compatible from 256 x 9 to 64k x 9
Status Flags: Empty, Half-Full, Full
Retransmit capability
High-performance CMOS technology
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing for #5962-88669 (IDT7203), 5962-89567
(IDT7203), and 5962-89568 (IDT7204) are listed on this function
DESCRIPTION:
TheIDT7203/7204/7205/7206/7207/7208aredual-portmemorybuffers
withinternalpointersthatloadandemptydataonafirst-in/first-outbasis. The
deviceusesFullandEmptyflagstopreventdataoverflowandunderflowand
expansionlogictoallowforunlimitedexpansioncapabilityinbothwordsizeand
depth.
DataistoggledinandoutofthedevicethroughtheuseoftheWrite(W)and
Read (R) pins.
The device's 9-bit width provides a bit for a control or parity at the user’s
to be reset to its initial position when RT is pulsed LOW. A Half-Full Flag is
available in the single device and width expansion modes.
These FIFOs are fabricated using high-speed CMOS technology. They
aredesignedforapplicationsrequiringasynchronousandsimultaneousread/
writesinmultiprocessing,ratebufferingandotherapplications.
MilitarygradeproductismanufacturedincompliancewithMIL-STD-883,
ClassB.
FUNCTIONAL BLOCK DIAGRAM
Industrial temperature range (–40
°C to +85°C) is available
(plastic packages only)
W
WRITE
CONTROL
READ
CONTROL
R
FLAG
LOGIC
EXPANSION
LOGIC
XI
WRITE
POINTER
RAM ARRAY
2,048 x 9
4,096 x 9
8,192 x 9
16,384 x 9
32,768 x 9
65,536 x 9
READ
POINTER
DATA INPUTS
RESET
LOGIC
THREE-
STATE
BUFFERS
DATA OUTPUTS
EF
FF
XO/HF
RS
FL/RT
0
(D -D8)
0
(Q -Q 8)
2661 drw01
Green parts available, see ordering information
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相關(guān)代理商/技術(shù)參數(shù) |
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| IDT72103L120D | 制造商:Integrated Device Technology Inc 功能描述:FIFO, 2K x 9, Asynchronous, 40 Pin, Ceramic, DIP |
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