參數(shù)資料
型號(hào): IDT7007L25PF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi): DRAM
英文描述: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM
中文描述: 32K X 8 DUAL-PORT SRAM, 25 ns, PQFP80
封裝: 14 X 14 MM, 1.40 MM HEIGHT, TQFP-80
文件頁(yè)數(shù): 20/21頁(yè)
文件大?。?/td> 257K
代理商: IDT7007L25PF
IDT7007S/L
High-Speed 32K x 8 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
20
Once the left side was finished with its task, it would write a one to
Semaphore 0 and may then try to gain access to Semaphore 1. If
Semaphore 1 was still occupied by the right side, the left side could undo
its semaphore request and perform other tasks until t was able to write, then
read a zero nto Semaphore 1. If the right processor performs a similar task
with Semaphore 0, this protocol would allow the two processors to swap
16K blocks of Dual-Port RAM with each other.
The blocks do not have to be any particular size and can even be
variable, depending upon the complexity of the software using the
semaphore flags. All eight semaphores could be used to divide the Dual-
Port RAM or other shared resources into eight parts. Semaphores can
even be assigned different meanings on different sides rather than being
given a common meaning as was shown in the example above.
Semaphores are a useful form of arbitration in systems like disk
interfaces where the CPU must be ocked out of a section of memory during
a transfer and the I/O device cannot tolerate any wait states. With the use
of semaphores, once the two devices has determined which memory area
was off-limits to the CPU, both the CPU and the I/O devices could access
their assigned portions of memory continuously without any wait states.
Semaphores are also useful in applications where no memory WAIT
state is available on one or both sides. Once a semaphore handshake has
been performed, both processors can access their assigned RAM
segments at full speed.
Another application is in the area of complex data structures. In this
case, block arbitration s very mportant. For this application one processor
may be responsible for building and updating a data structure. The other
processor then reads and interprets that data structure. If the interpreting
processor reads an ncomplete data structure, a major error condition may
exist. Therefore, some sort of arbitration must be used between the two
different processors. The building processor arbitrates for the block, locks
it and then is able to go in and update the data structure. When the update
is completed, the data structure block is released. This allows the
interpreting processor to come back and read the complete data structure,
thereby guaranteeing a consistent data structure.
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IDT7007L25PFB HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT7007L25PF8 功能描述:IC SRAM 256KBIT 25NS 80TQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:45 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類(lèi)型:SRAM - 雙端口,異步 存儲(chǔ)容量:128K(8K x 16) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP(14x14) 包裝:托盤(pán) 其它名稱(chēng):70V25S15PF
IDT7007L25PFB 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM
IDT7007L25PFI 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM
IDT7007L35G 功能描述:IC SRAM 256KBIT 35NS 68PGA RoHS:否 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類(lèi)型:EEPROM 存儲(chǔ)容量:8K (1K x 8) 速度:400kHz 接口:I²C,2 線串口 電源電壓:1.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:帶卷 (TR)
IDT7007L35GB 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM