參數(shù)資料
型號: IDT7007L25PF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM
中文描述: 32K X 8 DUAL-PORT SRAM, 25 ns, PQFP80
封裝: 14 X 14 MM, 1.40 MM HEIGHT, TQFP-80
文件頁數(shù): 16/21頁
文件大?。?/td> 257K
代理商: IDT7007L25PF
IDT7007S/L
High-Speed 32K x 8 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
16
Truth Table III Interrupt Flag
(1)
Waveform of Interrupt Timing
(1)
NOTES:
1. All timing is the same for left and right ports. Port A may be either the left or right port. Port B is the port opposite from port A.
2. See Interrupt Truth Table III.
3. Timing depends on which enable signal (
CE
or R/
W
) is asserted last.
4. Timing depends on which enable signal (
CE
or R/
W
) is de-asserted first.
NOTES:
1. Assumes
BUSY
L
=
BUSY
R
=V
IH
.
2. If
BUSY
L
= V
IL
, then no change.
3. If
BUSY
R
= V
IL
, then no change.
2940 drw 17
ADDR
"A"
INTERRUPT SET ADDRESS
CE
"A"
R/
W
"A"
t
AS
t
WC
t
WR
(3)
(4)
t
INS
(3)
INT
"B"
(2)
2940 drw 18
ADDR
"B"
INTERRUPT CLEAR ADDRESS
CE
"B"
OE
"B"
t
AS
t
RC
(3)
t
INR
(3)
INT
"B"
(2)
Left Port
Right Port
Function
R/
W
L
CE
L
OE
L
A
14L
-A
0L
INT
L
R/
W
R
CE
R
OE
R
A
14R
-A
0R
INT
R
L
L
X
7FFF
X
X
X
X
X
L
(2)
Set Right
INT
R
Flag
X
X
X
X
X
X
L
L
7FFF
H
(3)
Reset Right
INT
R
Flag
X
X
X
X
L
(3)
L
L
X
7FFE
X
Set Left
INT
L
Flag
X
L
L
7FFE
H
(2)
X
X
X
X
X
Reset Left
INT
L
Flag
2940 tbl 16
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IDT7007L25PFB HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM
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