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參數(shù)資料
| 型號： | IDT7006S55PFB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | Single Synchronous Buck PWM Controller |
| 中文描述： | 16K X 8 DUAL-PORT SRAM, 55 ns, PQFP64 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-64 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 263K |
| 代理商： | IDT7006S55PFB |
6.07
8
IDT7006S/L
HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING OF POWER-UP POWER-DOWN
WAVEFORM OF READ CYCLES
(5)
NOTES:
1. Timing depends on which signal is asserted last,
OE
or
CE
.
2. Timing depends on which signal is de-asserted first,
CE
or
OE
.
3. t
BDD
delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations
BUSY has no relation to valid output data.
4. Start of valid data depends on which timing becomes effective last t
AOE
, t
ACE
, t
AA
or t
BDD
.
5.
SEM
= V
IH
.
CE
2739 drw 08
t
PU
I
CC
I
SB
t
PD
50%
50%
t
RC
R/
W
CE
ADDRESS
t
AA
t
ACE(4)
OE
2739 drw 07
(4)
t
AOE(4)
(1)
t
LZ
t
OH
(2)
t
HZ
(3, 4)
t
BDD
DATA
OUT
BUSY
OUT
VALID DATA
(4)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT7006S55PFI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7006S55XL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7006S55XLB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7006S70F | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM |
| IDT7006S70FB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM |
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