參數(shù)資料
型號: IDT6198S55DB
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: Dual Low-Power JFET-Input General-Purpose Operational Amplifier 8-TSSOP -40 to 85
中文描述: 16K X 4 STANDARD SRAM, 55 ns, CDIP24
封裝: 0.300 INCH, CERDIP-24
文件頁數(shù): 5/8頁
文件大小: 79K
代理商: IDT6198S55DB
6.3
5
IDT6198S/L
CMOS STATIC RAM 64K (16K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0V
±
10%, All Temperature Ranges)
6198S15
(1)
6198L15
(1)
Symbol
Parameter
Min. Max. Min.
6198S20
6198L20
6198S25
6198L25
6198S35
6198L35
6198S45/55
(2)
6198S70/85
(2)
6198L45/55
(2)
6198L70/85
(2)
Max. Min. Max. Unit
Max. Min.
Max. Min. Max. Min.
Read Cycle
t
RC
Read Cycle Time
15
20
25
35
45/55
70/85
ns
t
AA
Address Access Time
15
19
25
35
45/55
70/85
ns
t
ACS
t
CLZ(3)
Chip Select Access Time
15
20
25
35
45/55
70/85
ns
Chip Select to Output in Low-Z
5
5
5
5
5
5
ns
t
OE
t
OLZ(3)
t
CHZ(3)
t
OHZ(3)
Output Enable to Output Valid
8
9
11
18
25/35
45/55
ns
Output Enable to Output in Low-Z
5
5
5
5
5
5
ns
Chip Select to Output in High-Z
2
7
2
8
2
10
2
14
15/20
25/30
ns
Output Disable to Output in High-Z
2
7
2
8
2
9
2
15
15/20
25/30
ns
t
OH
t
PU(3)
t
PD(3)
Output Hold from Address Change
5
5
2
5
5
5
ns
Chip Select to Power Up Time
0
0
0
0
0
0
ns
Chip Deselect to Power Down Time
15
20
25
35
45/55
70/85
ns
NOTES:
1. 0
°
to +70
°
C temperature range only.
2. –55
°
C to +125
°
C temperature range only.
3. This parameter is guaranteed by device characterization but is not production tested.
2987 tbl 11
NOTES:
1.
WE
is HIGH for Read cycle.
2. Device is continuously selected,
CS
is LOW.
3. Address valid prior to or coincident with
CS
transition LOW.
4.
OE
is LOW.
5. Transition is measured
±
200mV from steady state voltage.
ADDRESS
CS
DATA
OUT
OE
2987 drw 07
t
RC
t
AA
t
OH
t
ACS
t
CLZ(5)
t
CHZ(5)
t
OE
t
OLZ(5)
t
OHZ(5)
DATA VALID
TIMING WAVEFORM OF READ CYCLE NO. 1
(1)
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