參數(shù)資料
型號(hào): IDT5T9821NLI8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 27/36頁
文件大?。?/td> 0K
描述: IC CLK DRIVER ZD PLL 68-VFQFPN
產(chǎn)品變化通告: Product Discontinuation 05/Jan/2011
標(biāo)準(zhǔn)包裝: 2,500
類型: PLL 時(shí)鐘驅(qū)動(dòng)器
PLL: 帶旁路
輸入: eHSTL,HSTL,LVPECL,LVTTL
輸出: eHSTL,HSTL,LVTTL
電路數(shù): 1
比率 - 輸入:輸出: 2:5
差分 - 輸入:輸出: 是/是
頻率 - 最大: 250MHz
除法器/乘法器: 是/無
電源電壓: 2.3 V ~ 2.7 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 68-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 68-VFQFPN(10x10)
包裝: 帶卷 (TR)
其它名稱: 5T9821NLI8
33
INDUSTRIALTEMPERATURERANGE
IDT5T9821
EEPROMPROGRAMMABLE2.5VZERODELAYPLLDIFFERENTIALCLOCKDRIVER
Thefollowingsectionsprovideabriefdescriptionofeachinstruction.Fora
completedescriptionrefertotheIEEEStandardTestAccessPortSpecification
(IEEE Std. 1149.1-1990).
EXTEST
TherequiredEXTESTinstructionplacestheICintoanexternalboundary-
test mode and selects the boundary-scan register to be connected between
TDIandTDO. Duringthisinstruction,theboundary-scanregisterisaccessed
todrivetestdataoff-chipthroughtheboundaryoutputs,andrecievetestdata
off-chipthroughtheboundaryinputs. Assuch,theEXTESTinstructionisthe
workhorseofIEEE.Std1149.1,providingforprobe-lesstestingofsolder-joint
opens/shortsandoflogicclusterfunction.
SAMPLE/PRELOAD
The required SAMPLE/PRELOAD instruction allows the IC to remain in a
normalfunctionalmodeandselectstheboundary-scanregistertobeconnected
betweenTDIandTDO.Duringthisinstruction,theboundary-scanregistercan
beaccessedviaadatascanoperation,totakeasampleofthefunctionaldata
entering and leaving the IC.
IDCODE
TheoptionalIDCODEinstructionallowstheICtoremaininitsfunctionalmode
andselectstheoptionaldeviceidentificationregistertobeconnectedbetween
TDI and TDO. The device identification register is a 32-bit shift register
containing information regarding the IC manufacturer, device type, and
version code. Accessing the device identification register does not interfere
with the operation of the IC. Also, access to the device identification register
shouldbeimmediatelyavailable,viaaTAPdata-scanoperation,afterpower-
up of the IC or after the TAP has been reset using the optional TRST pin or
by otherwise moving to the Test-Logic-Reset state.
PROGWRITE
The PROGWRITE instruction is for writing the IDT5T9821 configuration
datatothedevice’svolatileprogrammingregisters. Thisinstructionselectsthe
programmingregisterpathforshiftingdatafromTDItoTDOduringdataregister
scanning. The programming register path has 112 registers (14 bytes)
between TDI and TDO. The 12 configuration data bytes are scanned in
throughTDIfirst,startingwithBit0. Afterscanninginthelastconfigurationbit,
Bit95,sixteenadditionalbitsmustbescannedintoplacetheconfigurationdata
intheproperlocation. Thelastsixteenregistersintheprogrammingpathare
reserved, read-only registers.
PROGREAD
ThePROGREADinstructionisforreadingouttheIDT5T9821configuration
datafromthedevice’svolatileprogrammingregisters. Thisinstructionselects
the programming register path for shifting data from TDI to TDO during data
registerscanning. Theprogrammingregisterpathhas112registersbetween
TDI and TDO, and the first bit scanned out through TDO will be Bit 0 of the
configurationdata.
PROGSAVE and PROGRESTORE (EEPROM OPERATION)
The PROGSAVE instruction is for copying the IDT5T9821 configuration
data from the device’s volatile programming registers to the EEPROM. This
instructionselectstheBYPASSregisterpathforshiftingdatafromTDItoTDO
during data register scanning.
ThePROGRESTOREinstructionisforloadingtheIDT5T9821configuration
data from the EEPROM to the device’s volatile programming registers. This
instructionselectstheBYPASSregisterpathforshiftingdatafromTDItoTDO
during data register scanning.
DuringtheexecutionofaPROGSAVEorPROGRESTOREinstruction,the
IDT5T9821willnotacceptanewprogramminginstruction(read,write,save,
orrestore). Allnon-programmingJTAGinstructionswillfunctionproperly,but
theusershouldwaituntilthesaveorrestoreiscompletebeforeissuinganew
programminginstruction. Thetimeittakesforthesaveandrestoreinstructions
tocompletedependsonthePLLoscillatorfrequency,FVCO. Therestoretime,
TRESTORE, and the save time, TSAVE, can be calculated as follows:
TRESTORE = 1.23X109/FVCO
(mS)
TSAVE = 3.09X109/FVCO + 52
(mS)
If a new programming instruction is issued before the save or restore
completes, the new instruction is ignored, and the BYPASS register path
remainsineffectforshiftingdatafromTDItoTDOduringdataregisterscanning.
InorderfortheProgSaveandProgRestoreinstructionstofunctionproperly,
the IDT5T9821 must not be in power-down mode (PD must be HIGH), and
the PLL must be enabled (PLL_EN = LOW and Bit 57 = 0).
Onpower-upoftheIDT5T9821,anautomaticrestoreisperformedtoload
the EEPROM contents into the internal programming registers. The auto-
restorewillnotfunctionproperlyifthedeviceisinpower-downmode(PDmust
beHIGH). Thedevice'sauto-restorefeaturewillfunctionregardlessofthestate
of the PLL_EN pin or Bit 57. The time it takes for the device to complete the
auto-restoreisapproximately3ms.
CLAMP
TheoptionalCLAMPinstructionloadsthecontentsfromtheboundary-scan
register onto the outputs of the IC, and selects the one-bit bypass register to
be connected between TDI and TDO. During this instruction, data can be
shifted through the bypass register from TDI to TDO without affecting the
conditionoftheICoutputs.
HIGH-IMPEDANCE
TheoptionalHigh-Impedanceinstructionsetsalloutputs(includingtwo-state
aswellasthree-statetypes)ofanICtoadisabled(high-impedance)stateand
selects the one-bit bypass register to be connected between TDI and TDO.
Duringthisinstruction,datacanbeshiftedthroughthebypassregisterfromTDI
toTDOwithoutaffectingtheconditionoftheICoutputs.
BYPASS
The required BYPASS instruction allows the IC to remain in a normal
functional mode and selects the one-bit bypass register to be connected
between TDI and TDO. The BYPASS instruction allows serial data to be
transferredthroughtheICfromTDItoTDOwithoutaffectingtheoperationof
the IC.
相關(guān)PDF資料
PDF描述
IDT5T9891NLI8 IC CLK DRIVER 2.5V PLL 68-VFQFPN
IDT5V2305NRGI8 IC CLK BUFF 1:5 200MHZ 16-VFQFPN
IDT5V2310NRGI8 IC CLK BUFF 1:10 200MHZ 20VFQFPN
IDT5V49EE501NLGI IC CLOCK GEN PLL 500MHZ 24QFN
IDT5V49EE502NLGI8 IC PLL CLK GEN 200MHZ 24VQFN
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT5T9890NLGI 功能描述:IC CLK DRIVER 2.5V PLL 68-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*
IDT5T9890NLGI8 功能描述:IC CLK DRIVER 2.5V PLL 68-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*
IDT5T9890NLI 功能描述:IC CLK DRIVER 2.5V PLL 68-VFQFPN RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*
IDT5T9890NLI8 功能描述:IC CLK DRIVER 2.5V PLL 68-VFQFPN RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*
IDT5T9891NLGI 功能描述:IC CLK DRIVER 2.5V PLL 68-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*