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參數(shù)資料
| 型號(hào)： | ICSSSTV16859CG-T |
| 英文描述： | DDR 13-Bit to 26-Bit Registered Buffer |
| 中文描述： | 復(fù)員13位至26位注冊(cè)緩沖區(qū) |
| 文件頁(yè)數(shù)： | 7/8頁(yè) |
| 文件大?。?/td> | 98K |
| 代理商： | ICSSSTV16859CG-T |
7
ICSSSTV16859C
0703A—10/15/02
Ordering Information
ICSSSTV16859CG-T
Designation for tape and reel packaging
Pattern Number (2 or 3 digit number for parts with ROM code
patterns)
Package Type
G=TSSOP
Revision Designator
(will not correlate with datasheet revision)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
Example:
ICS XXXX
y
G PPP - T
AREA
INDEX
1 2
N
D
E1
E
PLANE
SEATING
A1
A
A2
e
- C -
b
c
L
aaa
C
6.10 mm. Body, 0.50 mm. pitch TSSOP
(240 mil)
(0.020 mil)
MIN
--
0.05
0.80
0.17
0.09
SEE VARIATIONS
8.10 BASIC
MAX
1.20
0.15
1.05
0.27
0.20
MIN
--
.002
.032
.007
.0035
SEE VARIATIONS
0.319 BASIC
MAX
.047
.006
.041
.011
.008
A
A1
A2
b
c
D
E
E1
e
L
N
α
aaa
6.00
6.20
.236
0.020 BASIC
.244
0.45
SEE VARIATIONS
0.75
.018
SEE VARIATIONS
.030
0°
--
8°
0°
--
8°
0.10
.004
VARIATIONS
MIN
16.90
MAX
17.10
MIN
.665
MAX
.673
64
10-0039
SYMBOL
In Millimeters
COMMON DIMENSIONS COMMON DIMENSIONS
In Inches
0.50 BASIC
N
D mm.
D (inch)
Reference Doc.: JEDEC Publication 95, M O-153
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICSSSTV16859yG-T | DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTV32852 | DDR 24-Bit to 48-Bit Registered Buffer |
| ICSSSTV32852yHT | DDR 24-Bit to 48-Bit Registered Buffer |
| ICSSSTVA16857YGLF-T | DDR 14-Bit Registered Buffer |
| ICSSSTVA16857 | DDR 14-Bit Registered Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICSSSTV16859YG-T | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTV16859YK | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTV32852 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 24-Bit to 48-Bit Registered Buffer |
| ICSSSTV32852YHT | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 24-Bit to 48-Bit Registered Buffer |
| ICSSSTVA16857 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 14-Bit Registered Buffer |
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