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參數(shù)資料
| 型號： | ICS952906AGLFT |
| 英文描述： | Programmable Timing Control Hub for Next Gen P4⑩ processor |
| 中文描述： | 可編程定時控制中心，為下一代的處理器?、?/td> |
| 文件頁數(shù)： | 2/23頁 |
| 文件大小： | 315K |
| 代理商： | ICS952906AGLFT |
2
Integrated
Circuit
Systems, Inc.
ICS952906A
1236A—08/06/07
Pin Description
PIN # PIN NAME
1
*FS1/REF0
2
**FS0/REF1
3
VDDREF
4
X1
5
X2
6
GND
7
**FS2/PCICLK_F0
8
**FS4/PCICLK_F1
9
PCICLK_F2
10
VDDPCI
11
GND
PIN TYPE
I/O
I/O
PWR
IN
OUT
PWR
I/O
I/O
OUT
PWR
PWR
DESCRIPTION
Frequency select latch input pin / 14.318 MHz reference clock.
Frequency select latch input pin / 14.318 MHz reference clock.
Ref, XTAL power supply, nominal 3.3V
Crystal input, Nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Ground pin.
Frequency select latch input pin / 3.3V PCI free running clock output.
Frequency select latch input pin / 3.3V PCI free running clock output.
Free running PCI clock not affected by PCI_STOP# .
Power supply for PCI clocks, nominal 3.3V
Ground pin.
Function select latch input pin, 0=Desktop Mode (pin 44/45 are outputs), 1=Mobile Mode (pin44/45 are STOP
inputs) / PCI clock output.
PCI clock output.
PCI clock output.
PCI clock output.
PCI clock output.
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output.
PCI clock output.
Frequency select latch input pin / Fixed 48MHz clock output. 3.3V
Latched select input for 24/48MHz output / 24/48MHz clock output. 1=24MHz, 0 = 48MHz.
Ground pin.
Power pin for the 48MHz output.3.3V
3.3V 66.66MHz clock output
3.3V 66.66MHz clock output
Power pin for the 3.3V 66MHz clocks.
Ground pin.
3.3V 66.66MHz clock output
Real time system reset signal for frequency gear ratio change or watchdog timer timeout. This signal is
active low.
Clock pin of SMBus circuitry, 5V tolerant.
Data pin for SMBus circuitry, 3.3V tolerant.
This 3.3V LVTTL input is a level sensitive strobe used to determine when latch inputs are valid and are ready
to be sampled. This is an active high input. / Asynchronous active low input pin used to power down the
device into a low power state.
Power supply, nominal 2.5V
25MHz clock output, 2.5V
25MHz clock output, 2.5V
Ground pin.
Complementary clock of differential pair CPU outputs. These are current mode outputs. External resistors
are required for voltage bias.
True clock of differential pair CPU outputs. These are current mode outputs. External resistors are required
for voltage bias.
Supply for CPU clocks, 3.3V nominal
Complementary clock of differential pair CPU outputs. These are current mode outputs. External resistors
are required for voltage bias.
True clock of differential pair CPU outputs. These are current mode outputs. External resistors are required
for voltage bias.
Ground pin.
Complementary clock of differential pair CPU outputs. These are current mode outputs. External resistors
are required for voltage bias. / Stops all CPUCLK besides the free running clocks
12
**MODE/PCICLK0
I/O
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
PCICLK1
PCICLK2
PCICLK3
PCICLK4
VDDPCI
GND
PCICLK5
PCICLK6
**FS3/48MHz
**Sel24_48#/24_48MHz
GND
VDD48
3V66_1
VDD3V66
GND
3V66_0
OUT
OUT
OUT
OUT
PWR
PWR
OUT
OUT
I/O
I/O
PWR
PWR
OUT
OUT
PWR
PWR
OUT
30
Reset#
OUT
31
32
SCLK
SDATA
IN
I/O
33
VttPWR_GD/PD#
IN
34
35
36
37
VDD2.5
25Mhz_1
25Mhz_0
GND
PWR
OUT
OUT
PWR
38
CPUCLKC0
OUT
39
CPUCLKT0
OUT
40
VDDCPU
PWR
41
CPUCLKC1
OUT
42
CPUCLKT1
OUT
43
GND
PWR
44
CPUCLKC_ITP/(CPU_STOP#) I/O
45
CPUCLKT_ITP/(PCI_STOP#)
I/O
True clock of differential pair CPU outputs. These are current mode outputs. External resistors are required
for voltage bias. / Stops all PCICLK besides the free running clocks
This pin establishes the reference current for the differential current-mode output pairs. This pin requires a
fixed precision resistor tied to ground in order to establish the appropriate current. 475 ohms is the standard
value.
Ground pin.
3.3V power for the PLL core.
46
IREF
OUT
47
48
GND
VDDA
PWR
PWR
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參數(shù)描述 |
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| ICS952906BFLF | 功能描述:IC TIMING CTRL HUB P4 48SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS952906BFLFT | 功能描述:IC TIMING CTRL HUB P4 48SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS952906BGLF | 功能描述:IC TIMING CTRL HUB P4 48-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS952906BGLFT | 功能描述:IC TIMING CTRL HUB P4 48-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS952909AKLF | 功能描述:IC TIMING CTRL HUB P4 56-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
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