參數(shù)資料
型號(hào): ICS950812YGLFT
英文描述: Frequency Generator with 200MHz Differential CPU Clocks
中文描述: 頻率發(fā)生器200MHz的CPU的時(shí)鐘差分
文件頁數(shù): 24/29頁
文件大?。?/td> 225K
代理商: ICS950812YGLFT
24
ICS950812
0542G—08/21/03
All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock, there
is no defined phase relationship between 3V66_1_VCH and other 3V66 clocks. The PCI group should lag 3V66 by the
standard skew described below as Tpci.
Un-Buffered Mode 3V66 & PCI Phase Relationship
Group to Group Skews at Common Transition Edges: Unbuffered Mode
GROUP
SYMBOL
3V66 to PCI
1,2
S
3V66-PCI
3V66 (5:0) leads 33MHz PCI
1
Guarenteed by design, not 100% tested in production.
2
500ps Tolerance
CONDITIONS
MIN
1.5
TYP
2.55
MAX
3.5
UNITS
ns
E_PCICLK to PCICLK Skews
GROUP
SYMBOL
CONDITIONS
E_PCICLK1 (pin 11)=0
E_PCICLK3 (pin 13)=1
E_PCICLK1 (pin 11)=1
E_PCICLK3 (pin 13)=0
E_PCICLK1 (pin 11)=1
E_PCICLK3 (pin 13)=1
MIN
TYP
MAX
UNITS
T
E_PCI-PCI1
0.3
0.5
0.7
ns
T
E_PCI-PCI2
0.8
1.0
1.2
ns
T
E_PCI-PCI3
1.3
1.5
1.7
ns
1
Guaranteed by design, not 100% tested in production.
E_PCICLK to PCICLK
1
3V66 (1:0)
3V66 (4:2)
3V66_5
E_PCICLK (3,1)
PCICLK_F (2:0) PCICLK (6:0)
Tpci
Tepci
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