參數(shù)資料
型號(hào): ICS950104yFT
英文描述: Programmable System Clock Chip for PIII Processor
中文描述: 可編程系統(tǒng)時(shí)鐘芯片的PIII處理器
文件頁(yè)數(shù): 8/19頁(yè)
文件大?。?/td> 222K
代理商: ICS950104YFT
8
ICS950104
Advance Information
Third party brands and names are the property of their respective owners.
Byte 7: Vendor ID and Revision ID Register
Byte 8: Byte Count and Read Back Register
Notes:
1. PWD = Power on Default
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7
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V
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Byte 11: VCO Frequency Control Register
Note: The decimal representation of these 7 bits
(Byte 11 (6:0)) + 2 is equal to the REF divider value .
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7
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F
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C
E
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V
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5
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1
0
Byte 12: VCO Frequency Control Register
Note: The decimal representation of these 9 bits (Byte 12
bit (7:0) & Byte 11 bit (7) ) + 8 is equal to the VCO divider
value. For example if VCO divider value of 36 is desired,
user need to program 36 - 8 = 28, namely, 0, 00011100 into
byte 12 bit & byte 11 bit 7.
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V
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V
7
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1
Byte 9: Watchdog Timer Count Register
Note: FS values in bit (0:4) will correspond to Byte 0 FS
values. Default safe frequency is same as 00000 entry in
byte0.
Byte 10: VCO Control Selection Bit &
Watchdog Timer Control Register
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