參數(shù)資料
型號(hào)： ICS94236
英文描述： Programmable System Clock Chip for AMD - K7⑩ processor
中文描述： 可編程系統(tǒng)時(shí)鐘芯片為AMD - k7的⑩處理器
文件頁(yè)數(shù)： 8/17頁(yè)
文件大?。?/td> 226K
代理商： ICS94236
8
ICS94236
0451A
—
01/10/03
Byte 13: Spread Sectrum Control Register
Byte 14: Spread Sectrum Control Register
Note: Please utilize software utility provided by ICS
Application Engineering to configure spread
spectrum. Incorrect spread percentage may cause
system failure.
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
X
X
X
X
X
X
X
X
P
n
o
D
B
m
u
p
S
m
u
p
S
m
u
p
S
m
u
p
S
m
u
p
S
m
u
p
S
m
u
p
S
m
u
p
S
7
6
5
4
3
2
1
0
7
6
B
5
B
4
B
3
B
2
B
1
B
0
B
d
d
d
d
d
d
d
d
a
S
a
S
a
S
a
S
a
S
a
S
a
S
a
S
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
X
X
X
X
X
X
X
X
P
n
o
D
7
6
5
4
3
2
1
0
d
d
d
S
S
S
S
S
e
e
e
v
R
v
R
v
R
a
S
a
S
a
S
a
S
a
S
2
1
0
1
B
1
B
1
B
i
B
8
B
m
m
m
m
m
u
p
u
p
u
p
u
p
u
p
d
d
d
d
d
9
Note: Please utilize software utility provided by ICS
Application Engineering to configure spread
spectrum. Incorrect spread percentage may cause
system failure.
Byte 15: Output Skew Control
Byte 16: Output Skew Control
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
0
0
0
0
0
0
0
0
P
n
o
D
7
6
5
4
3
2
1
0
l
o
C
w
e
k
S
F
_
C
P
l
o
C
w
e
k
S
]
K
L
C
I
C
P
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
X
X
X
X
X
X
X
X
P
n
o
D
7
6
5
4
3
2
1
0
d
d
d
d
d
d
d
d
e
e
e
e
e
e
e
e
v
R
v
R
v
R
v
R
v
R
v
R
v
R
v
R
Byte 17: Output Rise/Fall Time Select Register
Byte 18: Output Rise/Fall Time Select Register
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
1
1
X
0
1
0
1
0
P
n
o
D
7
6
5
4
3
2
1
0
0
0
T
C
K
K
d
K
L
L
e
L
C
C
U
U
P
P
v
R
U
P
C
C
C
C
l
o
C
e
R
w
e
:
U
O
_
M
A
R
D
S
l
o
C
e
R
w
e
]
1
M
A
R
D
S
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
1
0
1
0
1
0
1
0
P
n
o
D
7
6
5
4
3
2
1
0
l
o
C
e
R
w
e
:
I
C
P
l
o
C
e
R
w
e
F
_
C
P
l
o
C
e
R
w
e
:
H
M
8
4
l
o
C
e
R
w
e
:
H
M
4
2
Notes:
1. PWD = Power on Default
2. The power on default for byte 13-20 depends on the harware (latch inputs FS[0:4]) or I
2
C (Byte 0 bit [1:7]) setting.
Be sure to read back and re-write the values of these 8 registers when VCO frequency change is desired for the first
pass.
3. If Byte 8 bit 7 is driven to "1" meaning programming is intended, Byte 21-24 will lose their default power up value.
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