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參數(shù)資料
| 型號： | ICS94236 |
| 英文描述： | Programmable System Clock Chip for AMD - K7⑩ processor |
| 中文描述： | 可編程系統(tǒng)時鐘芯片為AMD - k7的⑩處理器 |
| 文件頁數(shù)： | 13/17頁 |
| 文件大?。?/td> | 226K |
| 代理商： | ICS94236 |
13
ICS94236
0451A
—
01/10/03
Electrical Characteristics - SDRAM
TA = 0 - 70
°
C; VDD = 3.3 V +/-5%; CL = 20-30 pF (unless otherwise stated)
PARAMETER
SYMBOL
Output Impedance
1
R
DSP3B
Output High Voltage
V
OH3
Output Low Voltage
V
OL3
Output High Current
I
OH3
Output Low Current
I
OL3
Rise Time
1
t
r3
Fall Time
1
t
f3
Duty Cycle
1
d
t3
Skew Window
(0:11)
t
sk3
Skew Window
(0:12)
t
sk3
Jitter, Cycle-to-cycle
1
t
jcyc-cyc3
1 - Guaranteed by design, not 100% tested in production.
CONDITIONS
V
O
= V
DD
*0.5
IOH = -18mA
IOL = 9.4mA
V
OH
= 2.0 V
V
OL
= 0.8 V
V
OL
= 0.4 V, V
OH
= 2.4 V
V
OH
= 2.4 V, V
OL
= 0.4 V
V
T
= 1.5V
V
T
= 1.5V
V
T
= 1.5V
VT = 1.5V
MIN
10
2.4
TYP
MAX
24
UNITS
V
V
0.4
-46
mA
mA
ns
ns
%
pS
pS
pS
19
0.8
0.8
48.5
192
290
173
1.6
1.6
55
250
500
250
45
Electrical Characteristics - 24MHz,48MHz
TA = 0 - 70
°
C; VDD = 3.3 V +/-5%; CL = 20 pF (unless otherwise stated)
PARAMETER
SYMBOL
Output High Voltage
V
OH5
Output Low Voltage
V
OL5
Output High Current
I
OH5
Output Low Current
I
OL5
Rise Time
1
t
r5
Fall Time
1
t
f5
Duty Cycle
1
d
t5
Jitter, One Sigma
1
tj1s5
Jitter, Cycle to cycle
t
jcyc_cyc2B
1
Guaranteed by design, not 100% tested in production.
CONDITIONS
I
OH
= -16 mA
I
OL
= 9 mA
V
OH
= 2.0 V
V
OL
= 0.8 V
V
OL
= 0.4 V, V
OH
= 2.4 V
V
OH
= 2.4 V, V
OL
= 0.4 V
V
T
= 1.5V
V
T
= 1.5V
V
T
= 1.5V
MIN
2.4
TYP
MAX
UNITS
V
V
mA
mA
ns
ns
%
ns
ps
0.4
-22
16
1.1
1.28
52
4
4
55
0.5
500
45
177
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