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參數(shù)資料
| 型號： | ICS94235YFT |
| 英文描述： | PROGRAMMABLE SYSTEM CLOCK CHIP FOR AMD-K7 TM PROCESSOR |
| 中文描述： | 可編程系統(tǒng)時鐘芯片的AMD - k7的?處理器 |
| 文件頁數(shù)： | 5/19頁 |
| 文件大?。?/td> | 574K |
| 代理商： | ICS94235YFT |
ICS94235
Third party brands and names are the property of their respective owners.
Brief I
2
C registers description for ICS94235
Programmable System Frequency Generator
Register Name
Byte
Description
PWD Default
Functionality & Frequency
Select Register
0
Output frequency, hardware / I
2
C
frequency select, spread spectrum &
output enable control register.
See individual
byte description
Output Control Registers
1-6
Active / inactive output control
registers/latch inputs read back.
See individual
byte description
Vendor ID & Revision ID
Registers
7
Byte 11 bit[7:4] is ICS vendor id - 1001.
Other bits in this register designate device
revision ID of this part.
See individual
byte description
Byte Count
Read Back Register
8
Writing to this register will configure
byte count and how many byte will be
read back. Do not write 00
H
to this byte.
08
H
Watchdog Timer
Count Register
9
Writing to this register will configure the
number of seconds for the watchdog
timer to reset.
10
H
Watchdog Control Registers 10 Bit [6:0]
Watchdog enable, watchdog status and
programmable
’
safe
’
frequency
’
can be
configured in this register.
This bit select whether the output
frequency is control by hardware/byte 0
configurations or byte 11&12
programming.
000,0000
VCO Control Selection Bit
10 Bit [7]
0
VCO Frequency Control
Registers
11-12
These registers control the dividers ratio
into the phase detector and thus control
the VCO output frequency.
Depended on
hardware/byte 0
configuration
Depended on
hardware/byte 0
configuration
See individual
byte description
Spread Spectrum Control
Registers
13-14
These registers control the spread
percentage amount.
Group Skews Control
Registers
15-16
Increment or decrement the group skew
amount as compared to the initial skew.
Output Rise/Fall Time
Select Registers
17-20
These registers will control the output
rise and fall time.
See individual
byte description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS94235YGT | PROGRAMMABLE SYSTEM CLOCK CHIP FOR AMD-K7 TM PROCESSOR |
| ICS94236 | Programmable System Clock Chip for AMD - K7⑩ processor |
| ICS94236YF-T | Programmable System Clock Chip for AMD - K7⑩ processor |
| ICS950104yFT | Programmable System Clock Chip for PIII Processor |
| ICS950104 | Programmable System Clock Chip for PIII Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS94235YGT | 制造商:ICS 制造商全稱:ICS 功能描述:PROGRAMMABLE SYSTEM CLOCK CHIP FOR AMD-K7 TM PROCESSOR |
| ICS94236 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable System Clock Chip for AMD - K7⑩ processor |
| ICS94236YF-T | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable System Clock Chip for AMD - K7⑩ processor |
| ICS94241 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable TCH⑩ for Differential PIII⑩ Processor |
| ICS94241FLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable TCH⑩ for Differential PIII⑩ Processor |
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