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參數(shù)資料
| 型號： | ICS94235YFT |
| 英文描述： | PROGRAMMABLE SYSTEM CLOCK CHIP FOR AMD-K7 TM PROCESSOR |
| 中文描述： | 可編程系統(tǒng)時鐘芯片的AMD - k7的?處理器 |
| 文件頁數(shù)： | 2/19頁 |
| 文件大小： | 574K |
| 代理商： | ICS94235YFT |
ICS94235
Third party brands and names are the property of their respective owners.
Pin Descriptions
PIN NUMBER
PIN NAME
TYPE
DESCRIPTION
1
RESET#
OUT
Real time system reset signal for frequency value or watchdog timmer
timeout. This signal is active low.
2
PD#
1
IN
Asynchronous active low input pin used to power down the device into a low
power state. The internal clocks are disabled and the VCO and the crystal are
stopped. The latency of the power down will not be greater than 3ms.
4
5
X1
X2
IN
OUT
Crystal input,nominally 14.318MHz.
Crystal output, nominally 14.318MHz.
3, 11, 16, 23, 29,
34, 41, 48
8, 17, 28, 35, 40
6
GND
PWR
Ground pins
VDD
AVDD
FS0
2, 3
REF0
FS1
2, 3
AGP0
AGP1
PCICLK_F
FS2
1, 3
PCICLK
(5:4) (2:0)
PCICLK3
MODE
1, 3
AVDD48
FS3
2, 3
48MHz
SCLK
PWR
PWR
IN
OUT
IN
OUT
OUT
OUT
IN
Power supply pins, nominal 3.3V
Analog power supply pin, nominal 3.3V
Frequency select pin.
14.318 MHz reference clock.
Frequency select pin.
AGP outputs defined as 2X PCI. These may not be stopped.
AGP outputs defined as 2X PCI. These may not be stopped.
Free running PCICLK not stoped by PCI_STOP#
Frequency select pin.
10
20, 19, 15, 14, 13
OUT
PCI clock outputs.
OUT
IN
PWR
IN
OUT
IN
PCI clock output.
Function select pin, 1=Desktop Mode, 0=Mobile Mode.
Analog power supply pin, nominal 3.3V
Frequency select pin.
48MHz output clock
Clock input of I
2
C input, 5V tolerant input
Stops all PCICLKs besides the PCICLK_F clocks at logic 0 level,
when input low
SDRAM clock output.
21
24
PCI_STOP#
1
IN
SDRAM10
OUT
25, 26, 30, 31, 32,
33, 36, 37, 38, 39,
42, 43
44
SDRAM
(12:11, 9:0 )
OUT
SDRAM clock outputs.
SDATA
I/O
Data pin for I
2
C circuitry 5V tolerant
"True" clocks of differential pair CPU outputs. These open drain outputs
need an external 1.5V pull-up.
"Complementory" clocks of differential pair CPU outputs. This open drain
output need an external 1.5V pull-up.
45, 47
CPUCLKT (1:0)
OUT
46
CPUCLKC0
OUT
9
7
27
12
22
18
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS94235YGT | 制造商:ICS 制造商全稱:ICS 功能描述:PROGRAMMABLE SYSTEM CLOCK CHIP FOR AMD-K7 TM PROCESSOR |
| ICS94236 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable System Clock Chip for AMD - K7⑩ processor |
| ICS94236YF-T | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable System Clock Chip for AMD - K7⑩ processor |
| ICS94241 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable TCH⑩ for Differential PIII⑩ Processor |
| ICS94241FLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable TCH⑩ for Differential PIII⑩ Processor |
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