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參數(shù)資料
| 型號： | ICS9179F-03 |
| 元件分類： | 時鐘及定時 |
| 英文描述： | LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 0.209 INCH, SSOP-28 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 555K |
| 代理商： | ICS9179F-03 |
Integrated
Circuit
Systems, Inc.
General Description
Features
ICS9179-03
Block Diagram
PentiumPro is a trademark of Intel Corporation
I
2C is a trademark of Philips Corporation
Low Skew Fan Out Buffers
9179-03Rev E 6/2/99
Pin Configuration
The ICS9179-03 generates low skew clock buffers required
for high speed RISC or CISC microprocessor systems such as
Intel PentiumPro. Outputs will handle up to 100MHz clocks.
An output enable is provided for testability.
The device is a buffer with low output to output skew. This is
a Fanout buffer device, not using an internal PLL. This buffer
can also be a feedback to an external PLL stage for phase
synchronization to a master clock. There are a total of ten
outputs, sufficient for feedback to a PLL source and to drive
four small outline DIMM modules (S.O. DIMM) at 2 clocks
each. Or a total of ten outputs as a Fanout buffer from a
common clock source.
The individual clock outputs are addressable through I2C to
be enabled, or stopped in a low state for reduced EMI when
the lines are not needed.
Ten High speed, low noise non-inverting buffers for (to
100MHz), clock buffer applications.
Output slew rate faster than 1.5V/ns into 20pF
Supports up to four small outline DIMMS (S.O. DIMM).
Synchronous clocks skew matched to 250ps window on
OUTPUTs(0:9).
I2C Serial Configuration interface to allow individual
OUTPUTs to be stopped low.
Multiple VDD, VSS pins for noise reduction
Tri-state pin for testing
3.0V 3.7V supply range
28-pin(209mil)SSOPand(6.1mm)TSSOPpackage
28-Pin SSOP & TSSOP
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.
相關(guān)PDF資料 |
PDF描述 |
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| ICS9248YF-102-T | 166.5 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9248YF-102LF-T | 166.5 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS9248YF-24LF | PLL BASED CLOCK DRIVER, 22 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
| ICS9248YF-24 | PLL BASED CLOCK DRIVER, 22 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
| ICS9248YF-24LF | PLL BASED CLOCK DRIVER, 22 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS9179F-06 | 制造商:ICS 制造商全稱:ICS 功能描述:Zero Delay Buffers |
| ICS9179F12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Industrial Control IC |
| ICS9179G03 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Industrial Control IC |
| ICS9179M12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Industrial Control IC |
| ICS9179M-12 | 制造商:ICS 制造商全稱:ICS 功能描述:3 DIMM Buffer |
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