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參數(shù)資料
| 型號： | ICS9178Y-03 |
| 英文描述： | 245 MHz Clock Generator and Integrated Buffer for PowerPC™ |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 526K |
| 代理商： | ICS9178Y-03 |
5
ICS9178-03
AC Characteristics
V
DD
=+5V ±5%, 0°C
≥
TAMBIENT
≥
+70°C unless otherwise stated
Note 1: Parameter is guaranteed by design and characterization. Not tested 100% in production.
Note 2: For 70
Load, 2XPCLK level may be pulled-up with a 390
resistor to meet minimum pulse width requirements
at both 1.8V and 0.6V at 240 MHz.
PARAMETER
SYMBOL
fi
ICLKr
ICLKf
fo2XPCLK
TEST CONDITIONS
MIN
8
-
-
75
75
-
-
-
TYP
40.0
-
-
MAX
50.0
3
3
245
240
1.0
1.5
1.0
1.5
UNITS
MHz
ns
ns
MHz
Input Frequency (Note 1)
Input Clock Rise time (Note 1)
Input Clock Fall time (Note 1)
Output Frequency (2XPCLK)
6X mode, 8X mode
4X mode
15pF load 0.8 to 2.0V
Output Rise time, 0.8 to 2.0V 20%
to 80% (Note 1)
tr2XPCLK
-
-
-
ns
20% to 80%
Fall time 2.0 to 0.8 80% to 20%
(Note 1)
tf2XPCLK
15pF load 2.0 to 0.8V
ns
80% to 20%
Output Rise time 80% to 20%
(Note 1)
Output Fall time 80% to 20%
(Note 1)
t(TTL)r
15pF load
-
-
3.0
ns
t(TTL)f
15pF load
-
-
2.0
ns
Duty cycle 2XPCLK (Note 1)
dt1
200 to 240 MHz @ 1.4V 110
ohm, 15pF load
42.5
50
57.5
%
Pulse Width, High, 2XPCLK
(Note 1, 2)
Pulse Width, Low, 2XPCLK
(Note 1, 2)
Duty cycle ABCLK (Note 1)
Duty cycle ABCLK (Note 1)
Tpwr
@ 1.8V, 110
Load 2
1.2
-
-
ns
Tpwr
@ 0.6V, 110
Load 2
1.0
-
-
ns
dt3
dt4
15pF load @ 1.4V (8X mode)
15pF load @ 1.4V 6X mode
15pF load @ 1.4V 4X mode
70
61
45
75
66
50
80
71
55
%
%
Duty cycle TTL (other clocks)
(Note 1)
Jitter 1 Sigma 2XPCLK (10,000
samples) (Note 1)
Jitter 1 Sigma 1XPCLK B & D
(10,000 samples) (Note 1)
Jitter 1 Sigma AB clock (10,000
samples) (Note 1)
dt5
15pF load @ 1.4V
45
50
55
%
Tj1s1
for 200 to 240 MHz on
2XPCLK
for 200 to 240 MHz on
2XPCLK
for 200 to 240 MHz on
2XPCLK
for 200 to 240 MHz on
2XPCLK
for 200 to 240 MHz on
2XPCLK
for 200 to 240 MHz on
2XPCLK
-
40
-
ps
Tj1s2
-
50
-
ps
Tj1s3
-
60
-
ps
Jitter Absolute 2XPCLK (Note 1)
Tjabs1
-150
80
+150
ps
Jitter Absolute 1XPCLK, B, D
clocks (Note 1)
Tjabs2
-200
110
+200
ps
Jitter Absolute AB clock (Note 1)
Tjabs3
-250
120
+250
ps
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS9178-03 | 245 MHz Clock Generator and Integrated Buffer for PowerPC™ |
| ICS9179-03 | Low Skew Fan Out Buffers |
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| ICS9179F-06 | Zero Delay Buffers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS9179-03 | 制造商:ICS 制造商全稱:ICS 功能描述:Low Skew Fan Out Buffers |
| ICS9179-06 | 制造商:ICS 制造商全稱:ICS 功能描述:Zero Delay Buffers |
| ICS9179-12 | 制造商:ICS 制造商全稱:ICS 功能描述:3 DIMM Buffer |
| ICS9179B-01 | 制造商:ICS 制造商全稱:ICS 功能描述:Low Skew Buffers |
| ICS9179BF-01 | 功能描述:IC CLK BUFF 1:18 150MHZ 48-SSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅(qū)動器 系列:- 標(biāo)準(zhǔn)包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:管件 |
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