參數(shù)資料
型號: ICS85311AMLF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 11/16頁
文件大小: 0K
描述: IC CLOCK BUFFER 1:2 1GHZ 8-SOIC
標(biāo)準(zhǔn)包裝: 97
系列: HiPerClockS™
類型: 扇出緩沖器(分配)
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 是/是
輸入: HCSL,LVDS,LVHSTL,LVPECL,SSTL
輸出: ECL,LVPECL
頻率 - 最大: 1GHz
電源電壓: 2.375 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
其它名稱: 800-1166
800-1166-5
800-1166-ND
85311AMLF
ICS85311
LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVPECL/ECLFANOUT BUFFER
IDT / ICS LVPECL/ECL FANOUT BUFFER
4
ICS85311AM REV. D OCTOBER 22, 2008
Table 3C. LVPECL DC Characteristics, VCC = 3.3V±5% or 2.5V±5%, VEE = 0V, TA = 0°C to 70°C
NOTE1: Outputs terminated with 50
to V
CC – 2V.
AC Electrical Characteristics
Table 4A. AC Characteristics, VCC = 3.3V±5%, VEE = 0V, TA = 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. Device will meet specifications after thermal
equilibrium has been reached under these conditions.
All parameters are measured 500MHz unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential cross
points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions.
Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Table 4B. AC Characteristics, VCC = 2.5V±5%, VEE = 0V, TA = 0°C to 70°C
See Table 5A for NOTES.
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VOH
Output High Current; NOTE 1
VCC – 1.4
VCC – 0.9
V
VOL
Output Low Current; NOTE 1
VCC – 2.0
VCC – 1.7
V
VSWING
Peak-to-Peak Output Voltage Swing
0.65
1.0
V
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
fMAX
Maximum Output Frequency
1GHz
tPD
Propagation Delay; NOTE 1
≤ 1GHz
0.9
1.4
ns
tjit
Buffer Additive Phase Jitter,
RMS; refer to Additive Phase
Jitter Section
156.25MHz, Integration Range
(12kHz – 20MHz)
0.14
ps
tsk(o)
Output Skew; NOTE 2, 4
15
ps
tsk(pp)
Part-to-Part Skew; NOTE 3, 4
100
ps
tR / tF
Output Rise/Fall Time
20% to 80% @ 50MHz
300
700
ps
odc
Output Duty Cycle
48
52
%
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
fMAX
Maximum Output Frequency
1GHz
tPD
Propagation Delay; NOTE 1
≤ 1GHz
0.9
1.4
ns
tjit
Buffer Additive Phase Jitter,
RMS; refer to Additive Phase
Jitter Section
156.25MHz, Integration Range
(12kHz – 20MHz)
0.135
ps
tsk(o)
Output Skew; NOTE 2, 4
15
ps
tsk(pp)
Part-to-Part Skew; NOTE 3, 4
100
ps
tR / tF
Output Rise/Fall Time
20% to 80% @ 50MHz
300
700
ps
odc
Output Duty Cycle
48
52
%
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