- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄2073 > ICS85108AGILFT (IDT, Integrated Device Technology Inc)IC CLK BUFFER 1:8 500MHZ 24TSSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | ICS85108AGILFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 12/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK BUFFER 1:8 500MHZ 24TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | HiPerClockS™ |
| 類型： | 扇出緩沖器（分配） |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:8 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | HCSL，LVDS，LVHSTL，LVPECL，SSTL |
| 輸出： | HCSL |
| 頻率 - 最大： | 500MHz |
| 電源電壓： | 2.97 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 帶卷 (TR) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)當(dāng)前第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)
ICS85108I Data Sheet
LOW SKEW, 1-TO-8, DIFFERENTIAL-TO-0.7V HCSL CLOCK DISTRIBUTION CHIP
ICS85108AGI REVISION A OCTOBER 23, 2009
5
2009 Integrated Device Technology, Inc.
Additive Phase Jitter
The spectral purity in a band at a specific offset from the fundamental
compared to the power of the fundamental is called the dBc Phase
Noise. This value is normally expressed using a Phase noise plot
and is most often the specified plot in many applications. Phase noise
is defined as the ratio of the noise power present in a 1Hz band at a
specified offset from the fundamental frequency to the power value of
the fundamental. This ratio is expressed in decibels (dBm) or a ratio
of the power in the 1Hz band to the power in the fundamental. When
the required offset is specified, the phase noise is called a dBc value,
which simply means dBm at a specified offset from the fundamental.
By investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the entire
time record of the signal. It is mathematically possible to calculate an
expected bit error rate given a phase noise plot.
As with most timing specifications, phase noise measurements hase
issues relating to the limitations of the equipment. Often the noise
floor of the equipment is higher than the noise floor of the device. This
is illustrated above. The device meets the noise floor of what is
shown, but can actually be lower. The phase noise is dependent on
the input source and measurement equipment.
Additive Phase Jitter @ 250MHz
12kHz to 20MHz = 0.09ps (typical)
SSB
Phase
Noise
dBc/Hz
Offset from Carrier Frequency (Hz)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS8516FYILFT | IC CLK BUFF 1:16 700MHZ 48-LQFP |
| ICS8516FYLFT | IC CLK BUFF 1:16 700MHZ 48-LQFP |
| ICS8520DYLF | IC CLK BUFF 1:16 500MHZ 48-LQFP |
| ICS85210AY-31LF | IC CLK BUFFER 1:5 650MHZ 32-LQFP |
| ICS85211AMI-01LF | IC CLK BUFFER 1:2 700MHZ 8-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS85108AGIT | 制造商:Integrated Device Technology Inc 功能描述:IC CLK BUFFER 1:8 500MHZ 24TSSOP |
| ICS8512061AGILF | 功能描述:IC TXRX BIDIR 0.7V 1CH 8-TSSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| ICS8512061AGILFT | 功能描述:IC TXRX BIDIR 0.7V 1CH 8-TSSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| ICS8516FY | 制造商:Integrated Device Technology Inc 功能描述:IC FANOUT BUFFER LVDS 48LQFP 制造商:Integrated Device Technology Inc 功能描述:IC CLK BUFFER 1:16 700MHZ 48LQFP |
| ICS8516FYI | 制造商:Integrated Device Technology Inc 功能描述:IC FANOUT BUFFER LVDS 48LQFP 制造商:Integrated Device Technology Inc 功能描述:IC CLK BUFFER 1:16 700MHZ 48LQFP |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。