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參數(shù)資料
| 型號： | ICS844001-21 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | FEMTOCLOCKS⑩ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER |
| 中文描述： | FEMTOCLOCKS⑩晶體至LVDS頻率合成器 |
| 文件頁數(shù)： | 9/17頁 |
| 文件大小： | 309K |
| 代理商： | ICS844001-21 |
IDT
/ ICS
INSERT PRODUCT NAME
9
ICS844001AG-21 REV. A SEPTEMBER 14, 2007
ICS844001-21
FEMTOCLOCKS CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER
PRELIMINARY
A
PPLICATION
I
NFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS844001-21 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
, V
, and V
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required.
Figure 1
illustrates how
a 10
Ω
resistor along with a 10μF and a 0.01
μ
F bypass
capacitor should be connected to each V
DDA
.
P
OWER
S
UPPLY
F
ILTERING
T
ECHNIQUES
F
IGURE
1. P
OWER
S
UPPLY
F
ILTERING
10
Ω
V
DDA
10
μ
F
.01
μ
F
3.3V
.01
μ
F
V
DD
C
RYSTAL
I
NPUT
I
NTERFACE
The ICS844001-21 has been characterized with 18pF parallel
resonant crystals. The capacitor values shown in
Figure 2
below
F
IGURE
2. C
RYSTAL
I
NPU
t I
NTERFACE
were determined using a 25MHz 18pF parallel resonant crystal
and were chosen to minimize the ppm error.
I
NPUTS
:
C
RYSTAL
I
NPUTS
For applications not requiring the use of the crystal oscillator input,
both XTAL_IN and XTAL_OUT can be left floating. Though not
required, but for additional protection, a 1k
Ω
resistor can be tied
from XTAL_IN to ground.
REF_CLK I
NPUT
For applications not requiring the use of the reference clock, it
can be left floating. Though not required, but for additional
protection, a 1k
Ω
resistor can be tied from the REF_CLK to
ground.
LVCMOS C
ONTROL
P
INS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
Ω
resistor can be used.
R
ECOMMENDATIONS
FOR
U
NUSED
I
NPUT
AND
O
UTPUT
P
INS
O
UTPUTS
:
LVDS O
UTPUT
All unused LVDS output pairs can be either left floating or
terminated with 100
Ω
across. If they are left floating, there should
be no trace attached.
LVCMOS O
UTPUT
All unused LVCMOS output can be left floating. There should be
no trace attached.
XTAL_IN
XTAL_OUT
X1
18pF Parallel Crystal
C1
22p
C2
22p
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| ICS844001AGLFT | 功能描述:IC CLK GEN FIBRE CHAN 8-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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