參數(shù)資料
型號(hào): ICS843S1333DGLF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 2/14頁
文件大小: 0K
描述: IC CLK SYNTHESIZER 8TSSOP
標(biāo)準(zhǔn)包裝: 96
系列: HiPerClockS™
類型: 時(shí)鐘/頻率合成器
PLL:
輸入: 晶體
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 無/是
頻率 - 最大: 1.333GHz
除法器/乘法器: 無/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 8-TSSOP
包裝: 管件
ICS843S1333DG REVISION A MAY 6, 2010
10
2010 Integrated Device Technology, Inc.
ICS843S1333D Data Sheet
CRYSTAL-TO-3.3V LVPECL CLOCK SYNTHESIZER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS843S1333D.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS843S1333D is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
The maximum current at 70°C is as follows: IDD_MAX = 77.68mA
Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 77.68mA = 269.16mW
Power (outputs)MAX = 32mW/Loaded Output pair
Total Power_MAX (3.3V, with all outputs switching) = 269.16mW + 32mW = 301.16mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 115.2°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.301W * 115.2°C/W = 104.7°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (single layer or multi-layer).
Table 7. Thermal Resistance θJA for 8 Lead TSSOP, Forced Convection
θ
JA by Velocity
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
115.2°C/W
110.9°C/W
108.8°C/W
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