- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗1998 > ICS843251BGI-12LF (IDT, Integrated Device Technology Inc)IC CLK GENERATOR LVPECL 8-TSSOP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | ICS843251BGI-12LF |
| 寤犲晢锛� | IDT, Integrated Device Technology Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 16/16闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC CLK GENERATOR LVPECL 8-TSSOP |
| 妯欐簴鍖呰锛� | 96 |
| 绯诲垪锛� | HiPerClockS™, FemtoClock™ |
| 椤炲瀷锛� | 鏅傞悩鐧�(f膩)鐢熷櫒 |
| PLL锛� | 鏄� |
| 杓稿叆锛� | 鏅堕珨 |
| 杓稿嚭锛� | LVPECL |
| 闆昏矾鏁�(sh霉)锛� | 1 |
| 姣旂巼 - 杓稿叆:杓稿嚭锛� | 1:1 |
| 宸垎 - 杓稿叆:杓稿嚭锛� | 鐒�/鏄� |
| 闋荤巼 - 鏈€澶э細 | 312.5MHz |
| 闄ゆ硶鍣�/涔樻硶鍣細 | 鏄�/鏄� |
| 闆绘簮闆诲锛� | 2.375 V ~ 3.465 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-TSSOP锛�0.173"锛�4.40mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-TSSOP |
| 鍖呰锛� | 绠′欢 |
| 鍏跺畠鍚嶇ū锛� | 843251BGI-12LF |
IDT / ICS 3.3V, 2.5V LVPECL CLOCK GENERATOR
9
ICS843251BGI-12 REV. A NOVEMBER 19, 2012
ICS843251I-12
FEMTOCLOCK
CRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
TERMINATION FOR 2.5V LVPECL OUTPUTS
Figure 5A and Figure 5B show examples of termination for 2.5V
LVPECL driver. These terminations are equivalent to terminating
50
惟 to V
CC
- 2V. For V
CC
= 2.5V, the V
CC
- 2V is very close to ground
level. The R3 in Figure 5B can be eliminated and the termination
is shown in
Figure 5C.
FIGURE 5C. 2.5V LVPECL TERMINATION EXAMPLE
FIGURE 5B. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 5A. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
R2
62.5
Zo = 50 Ohm
R1
250
+
-
2.5V
2,5V LVPECL
Driv er
R4
62.5
R3
250
Zo = 50 Ohm
2.5V
VCC=2.5V
R1
50
R3
18
Zo = 50 Ohm
+
-
2,5V LVPECL
Driv er
VCC=2.5V
2.5V
R2
50
2,5V LVPECL
Driv er
VCC=2.5V
R1
50
R2
50
2.5V
Zo = 50 Ohm
+
-
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
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| ICS8432DYI-101LF | IC SYNTHESIZER 700MHZ 32-LQFP |
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| ICS843251BGI-12LFT | 鍔熻兘鎻忚堪:IC CLK GENERATOR LVPECL 8-TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅傞悩/瑷堟檪 - 鏅傞悩鐧�(f膩)鐢熷櫒锛孭LL锛岄牷鐜囧悎鎴愬櫒 绯诲垪:HiPerClockS™, FemtoClock™ 妯欐簴鍖呰:1,000 绯诲垪:- 椤炲瀷:鏅傞悩/闋荤巼鍚堟垚鍣�锛屾墖鍑哄垎閰� PLL:- 杓稿叆:- 杓稿嚭:- 闆昏矾鏁�(sh霉):- 姣旂巼 - 杓稿叆:杓稿嚭:- 宸垎 - 杓稿叆:杓稿嚭:- 闋荤巼 - 鏈€澶�:- 闄ゆ硶鍣�/涔樻硶鍣�:- 闆绘簮闆诲:- 宸ヤ綔婧害:- 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:56-VFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:56-VFQFP-EP锛�8x8锛� 鍖呰:甯跺嵎 (TR) 鍏跺畠鍚嶇ū:844S012AKI-01LFT |
| ICS843251BGI-12T | 鍒堕€犲晢:ICS 鍒堕€犲晢鍏ㄧū:ICS 鍔熻兘鎻忚堪:FEMTOCLOCKS鈶� CRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR |
| ICS843251BGI-15 | 鍒堕€犲晢:Integrated Device Technology Inc 鍔熻兘鎻忚堪:IC SYNTHESIZER LVPECL 8TSSOP |
| ICS843251BGI-15LF | 鍔熻兘鎻忚堪:IC CLK GEN ETHERNET 25MHZ 8TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅傞悩/瑷堟檪 - 鏅傞悩鐧�(f膩)鐢熷櫒锛孭LL锛岄牷鐜囧悎鎴愬櫒 绯诲垪:HiPerClockS™, FemtoClock™ 妯欐簴鍖呰:27 绯诲垪:Precision Edge® 椤炲瀷:闋荤巼鍚堟垚鍣� PLL:鏄� 杓稿叆:PECL锛屾櫠楂� 杓稿嚭:PECL 闆昏矾鏁�(sh霉):1 姣旂巼 - 杓稿叆:杓稿嚭:1:1 宸垎 - 杓稿叆:杓稿嚭:鐒�/鏄� 闋荤巼 - 鏈€澶�:800MHz 闄ゆ硶鍣�/涔樻硶鍣�:鏄�/鐒� 闆绘簮闆诲:3.135 V ~ 5.25 V 宸ヤ綔婧害:0°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:28-SOIC锛�0.295"锛�7.50mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-SOIC 鍖呰:绠′欢 |
| ICS843251BGI-15LFT | 鍔熻兘鎻忚堪:IC CLK GEN ETHERNET 25MHZ 8TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅傞悩/瑷堟檪 - 鏅傞悩鐧�(f膩)鐢熷櫒锛孭LL锛岄牷鐜囧悎鎴愬櫒 绯诲垪:HiPerClockS™, FemtoClock™ 妯欐簴鍖呰:1,000 绯诲垪:- 椤炲瀷:鏅傞悩/闋荤巼鍚堟垚鍣�锛屾墖鍑哄垎閰� PLL:- 杓稿叆:- 杓稿嚭:- 闆昏矾鏁�(sh霉):- 姣旂巼 - 杓稿叆:杓稿嚭:- 宸垎 - 杓稿叆:杓稿嚭:- 闋荤巼 - 鏈€澶�:- 闄ゆ硶鍣�/涔樻硶鍣�:- 闆绘簮闆诲:- 宸ヤ綔婧害:- 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:56-VFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:56-VFQFP-EP锛�8x8锛� 鍖呰:甯跺嵎 (TR) 鍏跺畠鍚嶇ū:844S012AKI-01LFT |
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