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IDT / ICS 3.3V, 2.5V LVPECL CLOCK GENERATOR
7
ICS843251BGI-12 REV. A NOVEMBER 19, 2012
ICS843251I-12
FEMTOCLOCK
CRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
APPLICATION INFORMATION
FIGURE 2. CRYSTAL INPUT INTERFACE
CRYSTAL INPUT INTERFACE
The ICS843251I-12 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 25MHz, 18pF parallel
resonant crystal and were chosen to minimize the ppm error.
The optimum C1 and C2 values can be slightly adjusted for
different board layouts.
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. To achieve optimum jitter per-
formance, power supply isolation is required. The ICS843251I-
12 provides separate power supplies to isolate any high switch-
ing noise from the outputs to the internal PLL. V
CC and VCCA should
be individually connected to the power supply plane through vias,
and 0.01F bypass capacitors should be used for each pin.
Fig-
ure 1 illustrates this for a generic V
CC pin and also shows that
V
CCA requires that an additional10Ω resistor along with a 10F
bypass capacitor be connected to the V
CCA pin.
FIGURE 1. POWER SUPPLY FILTERING
10
Ω
V
CC
10
μF
.01
μF
3.3V or 2.5V
.01
μF
V
CC
XTAL_IN
XTAL_OUT
X1
18pF Parallel Crystal
C1
27p
C2
27p