參數(shù)資料
型號: ICS843034AY
英文描述: MULTI-RATE 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
中文描述: 多速率3.3伏,2.5伏的LVPECL頻率合成器
文件頁數(shù): 15/23頁
文件大?。?/td> 250K
代理商: ICS843034AY
843034AY
www.icst.com/products/hiperclocks.html
REV. A JULY 25, 2005
15
Integrated
Circuit
Systems, Inc.
ICS843034
F
EMTO
C
LOCKS
M
ULTI
-R
ATE
3.3V, 2.5V LVPECL F
REQUENCY
S
YNTHESIZER
PRELIMINARY
F
IGURE
4C. H
I
P
ER
C
LOCK
S CLK/nCLK I
NPUT
D
RIVEN
BY
3.3V LVPECL D
RIVER
F
IGURE
4B. H
I
P
ER
C
LOCK
S CLK/nCLK I
NPUT
D
RIVEN
BY
3.3V LVPECL D
RIVER
F
IGURE
4D. H
I
P
ER
C
LOCK
S CLK/nCLK I
NPUT
D
RIVEN
BY
3.3V LVDS D
RIVER
3.3V
R1
50
R3
50
Zo = 50 Ohm
LVPECL
Zo = 50 Ohm
HiPerClockS
Input
CLK
nCLK
3.3V
R2
50
Zo = 50 Ohm
HiPerClockS
CLK
nCLK
3.3V
R3
R2
84
Zo = 50 Ohm
3.3V
R4
LVPECL
R1
84
3.3V
D
IFFERENTIAL
C
LOCK
I
NPUT
I
NTERFACE
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
and V
must meet the
V
and V
input requirements. Figures 4A to 4D show inter-
face examples for the HiPerClockS CLK/nCLK input driven by
the most common driver types. The input interfaces suggested
F
IGURE
4A. H
I
P
ER
C
LOCK
S CLK/nCLK I
NPUT
D
RIVEN
BY
ICS H
I
P
ER
C
LOCK
S LVHSTL D
RIVER
here are examples only. Please consult with the vendor of the
driver component to confirm the driver termination requirements.
For example in Figure 4A,the input termination applies for ICS
HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver
from another vendor, use their termination recommendation.
1.8V
R2
50
LVHSTL Driver
ICS
R1
50
LVHSTL
3.3V
Zo = 50 Ohm
Zo = 50 Ohm
HiPerClockS
CLK
nCLK
Zo = 50 Ohm
R1
100
3.3V
LVDS_Driver
Zo = 50 Ohm
Receiver
CLK
nCLK
3.3V
I
NPUTS
:
C
RYSTAL
I
NPUT
:
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating.
Though not required, but for additional protection, a 1k
Ω
resistor can be tied from XTAL_IN to ground.
TEST_CLK I
NPUT
:
For applications not requiring the use of the test clock, it can
be left floating. Though not required, but for additional
protection, a 1k
Ω
resistor can be tied from the TEST_CLK to
ground.
S
ELECT
P
INS
:
All select pins have internal pull-ups and pull-downs;
additional resistance is not required but can be added for
additional protection. A 1k
Ω
resistor can be used.
R
ECOMMENDATIONS
FOR
U
NUSED
I
NPUT
AND
O
UTPUT
P
INS
O
UTPUTS
:
LVCMOS O
UTPUT
:
All unused LVCMOS output can be left floating. We
recommend that there is no trace attached.
LVPECL O
UTPUT
All unused LVPECL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
相關(guān)PDF資料
PDF描述
ICS843034AYL MULTI-RATE 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
ICS843034AYLF MULTI-RATE 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
ICS843034AYLFT MULTI-RATE 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
ICS843034AYT MULTI-RATE 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
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