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參數(shù)資料
| 型號(hào)： | ICS60101 |
| 英文描述： | LOW PHASE NOISE CLOCK MULTIPLIER |
| 中文描述： | 低相位噪聲時(shí)鐘乘法器 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大小： | 176K |
| 代理商： | ICS60101 |
L
OW
P
HASE
N
OISE
C
LOCK
M
ULTIPLIER
MDS 601-01 L
3
Revision 111204
Integrated Circuit Systems
●
525 Race Street, San Jose, CA 95126
●
tel (408) 297-1201
●
www.icst.com
ICS601-01
Achieving Low Phase Noise
Figure 1 shows a typical phase noise measurement in a 125 MHz system. Therea are a few simple steps
that can be taken to achieve these levels of phase noise from the ICS601-01. Variations in VDD will
increase the hase noise, so it is important to have a stable, low noise supply voltage at the device. Use
decoupling capacitors of 0.1
μ
F in parallel with 0.01
μ
F. It is important to have these capacitors as close as
possible to the ICS601-01 supply pins.
Disabling the REFOUT clock is also important for achieving low phase noise; lab tests have shown that this
can reduce the phase noise by as much as 10 dBc/Hz.
External Component/Crystal Selection
The ICS601-01 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.01
μ
F and 0.1
μ
F should be connected between VDD and GND, as close to the part as
possible. A series termination resistor of 33
may be used for each clock output. The crystal must be
connected as close to the chip as possible. The crystal should be fundamental mode, parallel resonant. Do
not use third overtone. For exact tuning when using a crystal, capacitors should beconnected from pins X1
to ground and X2 to ground. In general, the value of these capacitors is given by the following equation,
where CL is the crystal load capacitance: Crystal caps (pF) = (CL - 5) x 2. So for a crystal with 16 pF load
capacitance, two 22 pF caps can be used. For any given board layout, ICS can measure the board
capacitance and recommend the exact capacitance value to use.
Fgure 1. Phase Noise of ICS601-01 for 125 MHz output, 25 MHz crystal input.
VDD= 3.3 V REFOUT disabled.
-140
1.00E+01
-120
-100
-80
-60
-40
-20
0
1.00E+02
1.00E+03
1.00E+04
1.00E+05
1.00E+06
1.00E+07
Offset fromCarrier (Hz)
P
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| ICS601 | ICS601 Demo Board Schematic |
| ICS601G-01 | HFBR2412THPFIBERRECEIVER |
| ICS601G-01I | LOW PHASE NOISE CLOCK MULTIPLIER |
| ICS601G-01ILF | PINFET,RCVR,820NM,8-PIN |
| ICS601G-01ILFT | LOW PHASE NOISE CLOCK MULTIPLIER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS601-01 | 制造商:ICS 制造商全稱:ICS 功能描述:Low Phase Noise Clock Multiplier |
| ICS601-02 | 制造商:ICS 制造商全稱:ICS 功能描述:Low Phase Noise Clock Multiplier |
| ICS601-21 | 制造商:ICS 制造商全稱:ICS 功能描述:LOW PHASE NOISE CLOCK MULTIPLIER |
| ICS601-25 | 制造商:ICS 制造商全稱:ICS 功能描述:LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER |
| ICS601G-01 | 功能描述:IC CLOCK MULTIPLIER 16-TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時(shí)鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無(wú)/無(wú) 頻率 - 最大:133.3MHz 除法器/乘法器:是/無(wú) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
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