參數(shù)資料
型號(hào): ICS541M
英文描述: PRELIMINARY INFORMATION PLL Clock Divider
中文描述: 初步資料PLL時(shí)鐘分頻器
文件頁(yè)數(shù): 4/4頁(yè)
文件大?。?/td> 59K
代理商: ICS541M
ICS541
PLL Clock Divider
MDS 541 B
Integrated Circuit Systems, Inc. 525 Race Street San JoseCA 95126 (408)295-9800tel www.icst.com
4
Revision 082500 Printed 11/14/00
PRELIMINARY INFORMATION
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in
normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements
are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any
ICS product for use in life support devices or critical medical instruments.
Ordering Information
Part/Order Number
ICS541M
ICS541MT
ClockBlocks is a trademark of ICS
Marking
ICS541M
ICS541M
Package
8 pin SOIC
Temperature
0 to 70 C
0 to 70 C
8 pin SOIC on tape and reel
Package Outline and Package Dimensions
(
For current dimensional specifications, see JEDEC Publication No. 95.)
B
D
E
H
e
A1
C
A
h x 45°
L
INDEX
AREA
1
2
8 pin SOIC
Inches
Min
0.0532
0.0040
0.0130
0.0075
0.1890
0.1497
e .050 BSC
H
0.2284
h
0.0099
L
0.0160
Millimeters
Min
1.35
0.10
0.33
0.19
4.80
3.80
1.27 BSC
0.2440
5.80
0.0195
0.25
0.0500
0.41
Symbol
A
A1
B
C
D
E
Max
0.0688
0.0098
0.0200
0.0098
0.1968
0.1574
Max
1.75
0.24
0.51
0.24
5.00
4.00
6.20
0.50
1.27
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