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參數(shù)資料
| 型號： | ICS2694M |
| 英文描述： | Motherboard Clock Generator |
| 中文描述： | 主板時鐘發(fā)生器 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 254K |
| 代理商： | ICS2694M |
Pin Description
PIN NUMBER
1
2
3
4
5
NAME
DESCRIPTION
OUT2
OUT1
OUT0
OUT9
CPUCLK
4mA Output.
4mA Output.
4mA Output
4mA Output.
4mA Output driven by Voltage Controlled Oscillator 1 (VC01). VC01 is controlled
by a 16 word ROM.
Ground for digital portion of chip.
Plus supply for digital portion of chip.
Input control for transparent latches associated with CPU (0-3) which select one of
16 values for CPUCLK. Holding STROBE high causes the latches to be transparent.
LSB CPUCLK address bit.
CPUCLK address bit.
CPUCLK address bit.
MSB CPUCLK address bit.
An alternative input for the reference clock. The crystal oscillator output and CLKIN
are gated together to generate the reference clock for the VCO’s. If CLKIN is used,
XTAL1 should be held high and XTAL2 left open. If the internal oscillator is used,
hold CLKIN high.
Pulling this line low tristates all outputs.
Ground for analog portion of chip.
Input of internal crystal oscillator stage.
Output of internal crystal oscillator stage. This pin should have nothing connected
to it but one of the quartz crystal terminals.
Positive supply for analog portion of chip.
4mA Output.
4mA Output. (Usually assigned as CPUCLK/2 for co-processor use.)
4mA Output.
4mA Output.
4mA Output.
4mA Output.
6
7
8
VSS
DVDD
STROBE
9
CPUSEL0
CPUSEL1
CPUSEL2
CPUSEL3
CLKIN
10
11
12
13
14
15
16
17
OUTPUTE
AVSS
XTAL1
XTAL2
18
19
20
21
22
23
24
AVDD
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3
ICS2694
2
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相關(guān)代理商/技術(shù)參數(shù) |
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