參數(shù)資料
型號: ICS270PGLF
英文描述: CAP 10UF 16V 10% TANT SMD-3216-18 TR-7
中文描述: 三鎖相環(huán)現(xiàn)場可編程VCXO的時(shí)鐘合成器
文件頁數(shù): 1/8頁
文件大?。?/td> 162K
代理商: ICS270PGLF
ICS270
MDS 270 B
1
Revision 040705
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
Triple PLL Field Programmable VCXO Clock Synthesizer
PRELIMINARY INFORMATION
Description
The ICS270 field programmable VCXO clock
synthesizer generates up to eight high-quality,
high-frequency clock outputs including multiple
reference clocks from a low-frequency crystal input. It
is designed to replace crystals and crystal oscillators in
most electronic systems.
Using ICS’ VersaClock
TM
software to configure PLLs
and outputs, the ICS270 contains a One-Time
Programmable (OTP) ROM for field programmability.
Programming features include VCXO, eight selectable
configuration registers and up to two sets of four
low-skew outputs.
Using Phase-Locked Loop (PLL) techniques, the
device runs from a standard fundamental mode,
inexpensive crystal, or clock. It can replace VCXOs,
multiple crystals and oscillators, saving board space
and cost.
The ICS270 is also available in factory programmed
custom versions for high-volume applications.
Features
Packaged as 20-pin TSSOP
Eight addressable registers
Replaces multiple crystals and oscillators
Output frequencies up to 200 MHz at 3.3 V
Input crystal frequency of 5 to 27 MHz
Up to eight reference outputs
Up to two sets of four low-skew outputs
Operating voltages of 3.3 V
Controllable output drive levels
Advanced, low-power CMOS process
Available in Pb (lead) free packaging
Block Diagram
Voltage
Controlled
Crystal
Oscillator
GND
2
3
VDD
PDTS
PLL2
PLL3
Divide
Logic
and
Output
Enable
Control
S2:S0
CLK1
CLK8
CLK7
CLK6
CLK5
CLK4
CLK3
CLK2
3
OTP
ROM
with
PLL
Values
X2
Crystal
External capacitors
are required.
X1
PLL1
VIN
相關(guān)PDF資料
PDF描述
ICS270 Triple PLL Field Programmable VCXO Clock Synthesizer
ICS280 Package Outline and Package Dimensions (16-pin TSSOP,173 Mil. Body)
ICS280PG Package Outline and Package Dimensions (16-pin TSSOP,173 Mil. Body)
ICS280PGI Package Outline and Package Dimensions (16-pin TSSOP,173 Mil. Body)
ICS280PGILF Package Outline and Package Dimensions (16-pin TSSOP,173 Mil. Body)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS270PGLFT 功能描述:VCXO CLK TRPL PLL PROGR 20-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:VersaClock™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器,扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP(8x8) 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT
ICS270PGT 功能描述:VCXO CLK TRPL PLL PROGR 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:VersaClock™ 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時(shí)鐘倍頻器,零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG
ICS271 制造商:ICS 制造商全稱:ICS 功能描述:Triple PLL Field Programmable VCXO Clock Synthesizer
ICS271PG 功能描述:VCXO CLK TRPL PLL PROGR 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:VersaClock™ 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時(shí)鐘倍頻器,零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG
ICS271PGI 功能描述:VCXO CLK TRPL PLL PROGR 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:VersaClock™ 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時(shí)鐘倍頻器,零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG