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參數(shù)資料
| 型號(hào)： | ICS2595 |
| 英文描述： | User-Programmable Dual High-Performance Clock Generator |
| 中文描述： | 用戶可編程雙路高性能時(shí)鐘發(fā)生器 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 272K |
| 代理商： | ICS2595 |
ICS2595
back divider modulus we divide the VCO frequency by the
reference frequency and multiply by the reference divider:
which we round off to 275. The exact output frequency will
be:
275
43
*14.31818*
The value of the
N
programming bits may be calculated by
subtracting 257 from the desired feedback divider modulus.
Thus, the
N
value will be set to 18 (275-257) or 000100102.
The
D
bit programming is set to 10 (from Table 4).
Reference Oscillator & Crystal
Selection
The
ICS2595
has on-board circuitry to implement a Pierce
oscillator with the addition of only one external component,
a quartz crystal. Pierce oscillators operate the crystal in
parallel-resonant (also called anti-resonant mode). See the
AC Characteristics for the effective capacitive loading to
specify when ordering crystals.
Crystals characterized for their series-resonant frequency
may also be used with the
ICS2595
. Be aware that the
oscillation frequency in circuit will be slightly higher than
the frequency that is stamped on the can (typically 0.025-
0.05%).
As the entire operation of the phaselocked loop depends on
having a stable reference frequency, we recommend that the
crystal be mounted as closely as possible to the package.
Avoid routing digital signals or the
ICS2595
outputs
underneath or near these traces. It is also desirable to ground
the crystal can to the ground plane, if possible.
External Reference Sources
An external frequency source may be used as the reference
for the VCLK and MCLK PLLs. To implement this, simply
connect the reference frequency source to the X1 pin of the
ICS2595
. For best results, insure that the clock edges are as
clean and fast as possible and that the input voltage thresholds
are not violated.
91.446
14.31818
*43=274.62
1
2
=45.784 MHz
Power Supply
The
ICS2595
has three GND pins to reduce the effects of
package inductance. All pins are connected to the same
potential on the die (the ground bus). All of these pins
should connect to the ground plane of the video board as
close to the package as is possible.
The
ICS2595
has two
VDD
pins which supply of +5 volt
power to the output stages. These pins should be connected
to the power plane (or bus) using standard high-frequency
decoupling practice. That is, use low-capacitors should have
low series inductance and be mounted close to the
ICS2595
.
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+
,-*
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