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參數(shù)資料
| 型號： | ICS1893BKLF |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 65/133頁 |
| 文件大?。?/td> | 0K |
| 描述： | PHYCEIVER LOW PWR 3.3V 56-VQFN |
| 標準包裝： | 260 |
| 系列： | PHYceiver™ |
| 類型： | PHY 收發(fā)器 |
| 規(guī)程： | MII |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 56-VFQFP-EP（8x8） |
| 包裝： | 管件 |
| 其它名稱： | 1893BKLF 800-1019 |
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Chapter 6 Functional Blocks
ICS1893BF, Rev. F, 5/13/10
May, 2010
37
ICS1893BF Data Sheet Rev. F - Release
Copyright 2009, IDT, Inc.
All rights reserved.
6.3.3 PCS/PMA Transmit Modules
Both the PCS and PMA sublayers have Transmit modules.
6.3.3.1 PCS Transmit Module
The ICS1893BF PCS Transmit module accepts nibbles from the MAC Interface and converts the nibbles
into 5-bit ‘code groups’ (referred to here as ‘symbols’). In addition, the PCS Transmit module performs a
parallel-to-serial conversion on the symbols, and subsequently passes the resulting serial bit stream to the
PMA sublayer.
The first 16 nibbles of each MAC Frame represent the Frame Preamble. The PCS replaces the first two
nibbles of the Frame Preamble with the Start-of-Stream Delimiter (SSD), that is, the symbols /J/K/. After
receipt of the last Frame nibble, detected when TX_EN = FALSE, the PCS appends to the end of the Frame
an End-of-Stream Delimiter (ESD), that is, the symbols /T/R/. (The ICS1893BF PCS does not alter any
other data included within the Frame.)
The PCS Transmit module also performs collision detection. In compliance with the ISO/IEC specification,
when the transmission and reception of data occur simultaneously and the ICS1893BF is in:
Half-duplex mode, the ICS1893BF asserts the collision detection signal (COL).
Full-duplex mode, COL is always FALSE.
6.3.3.2 PMA Transmit Module
The ICS1893BF PMA Transmit module accepts a serial bit stream from its PCS and converts the data into
NRZI format. Subsequently, the PMA passes the NRZI bit stream to the Twisted-Pair Physical Medium
Dependent (TP-PMD) sublayer.
The ICS1893BF PMA Transmit module uses a digital PLL to synthesize a transmit clock from the Clock
Reference Interface.
6.3.4 PCS/PMA Receive Modules
Both the PCS and PMA sublayers have Receive modules.
6.3.4.1 PCS Receive Module
The ICS1893BF PCS Receive module accepts both a serial bit stream and a clock signal from the PMA
sublayer. The PCS Receive module converts the bit stream from a serial format to a parallel format and
then processes the data to detect the presence of a carrier.
When a link is in the idle state, the PCS Receive module receives IDLE symbols. (All bits are logic one.)
Upon receiving two non-contiguous zeros in the bit stream, the PCS Receive module examines the
ensuing bits and attempts to locate the Start-of-Stream Delimiter (SSD), that is, the /J/K/ symbols.
Upon verification of a valid SSD, the PCS Receive module substitutes the first two standard nibbles of a
Frame Preamble for the detected SSD. In addition, the PCS Receive module uses the SSD to begin
framing the ensuing data into 5-bit code symbols. The final PCS Receive module performs 4B/5B decoding
on the symbols and then synchronously passes the resulting nibbles to the MAC Interface.
The Receive state machine continues to accept PMA data, convert it from serial to parallel format, frame it,
decode it, and pass it to the MAC Interface. During this time, the Receive state machine alternates between
Receive and Data States. It continues this process until detecting one of the following:
An End-of-Stream Delimiter (ESD, that is, the /T/R/ symbols)
An error
A premature end (IDLEs)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1893BKLFT | 功能描述:PHYCEIVER LOW PWR 3.3V 56-VQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:PHYceiver™ 標準包裝:250 系列:- 類型:收發(fā)器 驅動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
| ICS1893BKT | 功能描述:PHYCEIVER LOW PWR 3.3V 56-VQFN RoHS:否 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:PHYceiver™ 標準包裝:250 系列:- 類型:收發(fā)器 驅動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
| ICS1893BRIEF | 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893BY-10 | 功能描述:PHYCEIVER LOW PWR 3.3V 64-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:PHYceiver™ 標準包裝:1,000 系列:- 類型:收發(fā)器 驅動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:16-SOIC 包裝:帶卷 (TR) |
| ICS1893BY-10LF | 功能描述:PHYCEIVER LOW PWR 3.3V 64-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:PHYceiver™ 標準包裝:250 系列:- 類型:收發(fā)器 驅動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
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