參數(shù)資料
型號: ICS1893BKILFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 93/133頁
文件大?。?/td> 0K
描述: PHYCEIVER LOW PWR 3.3V 56-VQFN
標準包裝: 1
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤
供應商設備封裝: 56-VFQFP-EP(8x8)
包裝: 標準包裝
產品目錄頁面: 1252 (CN2011-ZH PDF)
其它名稱: 800-1795-6
ICS1893BF, Rev. F, 5/13/10
May, 2010
62
Chapter 7 Management Register Set
ICS1893BF Data Sheet - Release
Copyright 2009, IDT, Inc.
All rights reserved.
7.4 Register 2: PHY Identifier Register
Table 7-7 lists the bits for PHY Identifier Register (Register 2), which is one of two PHY Identifier Registers
that are part of a set defined by the ISO/IEC specification. As a set, the PHY Identifier Registers (Registers
2 and 3) include a unique, 32-bit PHY Identifier composed from the following:
Organizationally Unique Identifier (OUI), discussed in this section
Manufacturer’s PHY Model Number, discussed in Section 7.5, “Register 3: PHY Identifier Register”
Manufacturer’s PHY Revision Number, discussed in Section 7.5, “Register 3: PHY Identifier Register”
All of the bits in the two PHY Identifier Registers are Command Override Write bits. An STA can read them
at any time without condition. However, an STA can modify these register bits only when the Command
Register Override bit (bit 16.15) is enabled with a logic one.
Note: For an explanation of acronyms used in Table 7-5, see Chapter 1, “Abbreviations and Acronyms”.
Table 7-7. PHY Identifier Register (Register 2 [0x02])
Bit
Definition
When Bit = 0 When Bit = 1
Access
Special
Function
Default
Hex
2.15
OUI bit 3 | c
N/A
CW
0
2.14
OUI bit 4 | d
N/A
CW
0
2.13
OUI bit 5 | e
N/A
CW
0
2.12
OUI bit 6 | f
N/A
CW
0
2.11
OUI bit 7 | g
N/A
CW
0
2.10
OUI bit 8 | h
N/A
CW
0
2.9
OUI bit 9 | I
N/A
CW
0
2.8
OUI bit 10 | j
N/A
CW
0
2.7
OUI bit 11 | k
N/A
CW
0
1
2.6
OUI bit 12 | l
N/A
CW
0
2.5
OUI bit 13 | m
N/A
CW
0
2.4
OUI bit 14 | n
N/A
CW
1
2.3
OUI bit 15 | o
N/A
CW
0
5
2.2
OUI bit 16 | p
N/A
CW
1
2.1
OUI bit 17 | q
N/A
CW
0
2.0
OUI bit 18 | r
N/A
CW
1
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