
F3
ICE3BS02L
Functional Description
Version 1.1
12
28 Sep 2005
same procedure happens to the external Soft Start capacitor
if a low load condition is detected by comparator C5 when
V
FB
is falling below 1.32V. Only after V
SoftS
has exceeded
5.4V and V
FB
is still below 1.32V Active Burst Mode is
entered.
3.6.2
The controller provides Active Burst Mode for low load
conditions at V
OUT
. Active Burst Mode increases
significantly the efficiency at light load conditions while
supporting a low ripple on V
OUT
and fast response on load
jumps. During Active Burst Mode which is controlled only
by the FB signal the IC is always active and can therefore
immediately response on fast changes at the FB signal. The
Startup Cell is kept switched off to avoid increased power
losses for the self supply.
SoftS
Active Burst Mode
Figure 15
Active Burst Mode
The Active Burst Mode is located in the Control Unit. Figure
15 shows the related components.
3.6.2.1
The FB signal is always observed by the comparator C5 if
the voltage level falls below 1.32V. In that case the switch S1
is released which allows the capacitor C
SoftS
to be charged
starting from the clamped voltage level at 4.4V in normal
operating mode. If V
SoftS
exceeds 5.4V the comparator C3
Entering Active Burst Mode
releases the gate G6 to enter the Active Burst Mode. The
time window that is generated by combining the FB and
SoftS signals with gate G6 avoids a sudden entering of the
Active Burst Mode due to large load jumps. This time
window can be adjusted by the external capacitor C
SoftS
.
After entering Active Burst Mode a burst flag is set and the
internal bias is switched off in order to reduce the current
consumption of the IC down to approx. 1.05mA. In this Off
State Phase the IC is no longer self supplied so that therefore
C
VCC
has to provide the VCC current (see Figure 16).
Furthermore gate G11 is then released to start the next burst
cycle once V
FB
has 3.4V exceeded.
It has to be ensured by the application that the VCC remains
above the Undervoltage Lockout Level of 8.5V to avoid that
the Startup Cell is accidentally switched on. Otherwise
power losses are significantly increased. The minimum VCC
level during Active Burst Mode is depending on the load
conditions and the application. The lowest VCC level is
reached at no load conditions at V
OUT
.
3.6.2.2
After entering the Active Burst Mode the FB voltage rises as
V
OUT
starts to decrease due to the inactive PWM section.
Comparator C6a observes the FB signal if the voltage level
4V is exceeded. In that case the internal circuit is again
activated by the internal Bias to start with switching. As now
in Active Burst Mode the gate G10 is released the current
limit is only 0.257V to reduce the conduction losses and to
avoid audible noise. If the load at V
OUT
is still below the
starting level for the Active Burst Mode the FB signal
decreases down to 3.4V. At this level C6b deactivates again
the internal circuit by switching off the internal Bias. The
gate G11 is released as after entering Active Burst Mode the
burst flag is set. If working in Active Burst Mode the FB
voltage is changing like a saw tooth between 3.4V and 4V
(see Figure 16).
Working in Active Burst Mode
3.6.2.3
The FB voltage immediately increases if there is a high load
jump. This is observed by comparator C4. As the current
limit is ca. 26% during Active Burst Mode a certain load
jump is needed that FB can exceed 4.8V. At this time C4
resets the Active Burst Mode which also blocks C12 by the
Leaving Active Burst Mode
C3
5.4V
C4
4.8V
C6a
4.0V
1.32V
FB
Control Unit
Active
Burst
Mode
4.4V
S1
5k
Internal Bias
R
SoftS
6.5V
&
G10
Current
Limiting
&
G6
C6b
3.4V
&
G11
C5