參數(shù)資料
型號(hào)： 95V2F857AKLFT
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時(shí)鐘及定時(shí)
英文描述： 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC40
封裝： LEAD FREE, MLF-40
文件頁(yè)數(shù)： 1/13頁(yè)
文件大?。?/td> 146K
代理商： 95V2F857AKLFT
Integrated
Circuit
Systems, Inc.
ICS95V2F857A
1065A—02/03/05
Block Diagram
2.5V Wide Range Frequency Clock Driver (45MHz - 233MHz)
Pin Configuration
48-Pin TSSOP/TVSOP
Recommended Application:
Heavy loaded/4 rank
DDR Memory Modules / Zero Delay Board Fan Out
Provides complete DDR registered DIMM solution
with ICSSSTVF16857, ICSSSTVF16859 or
ICSSSTVA32852
Product Description/Features:
Higher drive than the 95V857 series devices
Low skew, low jitter PLL clock driver
1 to 10 differential clock distribution (SSTL_2)
Feedback pins for input to output synchronization
PD# for power management
Spread Spectrum-tolerant inputs
Auto PD when input signal removed
Specifications:
Meets PC3200 Class A+ specification for DDR-I 400
support
Covers all DDRI speed grades
Switching Characteristics:
CYCLE - CYCLE jitter: <50ps
OUTPUT - OUTPUT skew: <40ps
Period jitter: ±30ps
S
T
U
P
N
IS
T
U
P
T
U
O
e
t
a
t
S
L
P
D
V
A#
D
PT
N
I
_
K
L
CC
N
I
_
K
L
CT
K
L
CC
K
L
CT
T
U
O
_
B
FC
T
U
O
_
B
F
D
N
GH
L
H
L
H
L
H
f
o
/
d
e
s
a
p
y
B
D
N
GH
H
L
H
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H
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o
/
d
e
s
a
p
y
B
V
5
.
2
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m
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(
LL
H
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.
2
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m
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LH
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m
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n
(
HL
H
L
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m
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m
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Functionality
PLL
FB_INT
FB_INC
CLK_INC
CLK_INT
PD#
Control
Logic
FB_OUTT
FB_OUTC
CLKT0
CLKT1
CLKT2
CLKT3
CLKT4
CLKT5
CLKT6
CLKT7
CLKT8
CLKT9
CLKC0
CLKC1
CLKC2
CLKC3
CLKC4
CLKC5
CLKC6
CLKC7
CLKC8
CLKC9
6.10 mm Body, 0.50 mm Pitch = TSSOP
4.40 mm Body, 0.40 mm Pitch = TVSOP
GND
CLKC0
CLKT0
VDD
CLKT1
CLKC1
GND
CLKC2
CLKT2
VDD
CLK_INT
CLK_INC
VDD
AVDD
AGND
GND
CLKC3
CLKT3
VDD
CLKT4
CLKC4
GND
CLKC5
CLKT5
VDD
CLKT6
CLKC6
GND
CLKC7
CLKT7
VDD
PD#
FB_INT
FB_INC
VDD
FB_OUTC
FB_OUTT
GND
CLKC8
CLKT8
VDD
CLKT9
CLKC9
GND
ICS95V2F857A
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相關(guān)PDF資料
PDF描述
95V2F857AHLFT 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA56
95V842AFILF-T 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
95V842YFLF-T 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
95V842YFILF 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
95V842AFLF 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
95V842AFILF 制造商:Integrated Device Technology Inc 功能描述:16 QSOP (GREEN) - Bulk
95V842AFILFT 制造商:Integrated Device Technology Inc 功能描述:PLL CLOCK DRVR SGL 33MHZ TO 333MHZ 16QSOP - Tape and Reel
95V842AFLF 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
95V842AFLFT 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
95V847AG 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 1:5, 2.5V Phase-Lock Loop Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
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